Patents by Inventor Ved Pragyan

Ved Pragyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reset current delivery in non-volatile random access memory
    Patent number: 9715930
    Abstract: Embodiments of the present disclosure describe techniques and configurations for providing a reset current to a non-volatile random access memory (NVRAM), such as a phase change memory (PCM) device. In an embodiment, the apparatus may comprise an NVRAM device; a selection mirror circuit coupled with the NVRAM device to apply a selection mirror voltage to the NVRAM device, to select a memory cell of the NVRAM device; and a reset mirror circuit coupled with the NVRAM device to apply a reset mirror voltage to the memory cell of the NVRAM device, subsequent to the application of the selection mirror voltage, to reset the memory cell. The reset mirror voltage may be lower than the selection mirror voltage, to facilitate delivery of a reset current above a current threshold to the memory cell. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: July 25, 2017
    Assignee: Intel Corporation
    Inventors: Sandeep K. Guliani, Ved Pragyan
  • RESET CURRENT DELIVERY IN NON-VOLATILE RANDOM ACCESS MEMORY
    Publication number: 20160358652
    Abstract: Embodiments of the present disclosure describe techniques and configurations for providing a reset current to a non-volatile random access memory (NVRAM), such as a phase change memory (PCM) device. In an embodiment, the apparatus may comprise an NVRAM device; a selection mirror circuit coupled with the NVRAM device to apply a selection mirror voltage to the NVRAM device, to select a memory cell of the NVRAM device; and a reset mirror circuit coupled with the NVRAM device to apply a reset mirror voltage to the memory cell of the NVRAM device, subsequent to the application of the selection mirror voltage, to reset the memory cell. The reset mirror voltage may be lower than the selection mirror voltage, to facilitate delivery of a reset current above a current threshold to the memory cell. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 4, 2015
    Publication date: December 8, 2016
    Inventors: Sandeep K. Guliani, Ved Pragyan