Patents by Inventor Veeramani PERUMAL

Veeramani PERUMAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10276627
    Abstract: A method of fabricating a solid state radiation detector method includes mechanically lapping and polishing the first and the second surfaces of a semiconductor wafer using a plurality of lapping and polishing steps. The method also includes growing passivation oxide layers by use of oxygen plasma on the top of the polished first and second surfaces in order to passivate the semiconductor wafer. Anode contacts are deposited and patterned on top of the first passivation oxide layer, which is on top of the first surface. Cathode contacts, which are either monolithic or patterned, are deposited on top of the second passivation oxide layer, which is on the second surface. Aluminum nitride encapsulation layer can be deposited over the anode contacts and patterned to encapsulate the first passivation oxide layer, while physically exposing a center portion of each anode contact to electrically connect the anode contacts.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: April 30, 2019
    Assignee: REDLEN TECHNOLOGIES, INC.
    Inventors: Uri El-Hanany, Adam Densmore, Saeid Taherion, Georgios Prekas, Veeramani Perumal
  • Publication number: 20180033822
    Abstract: A method of fabricating a solid state radiation detector method includes mechanically lapping and polishing the first and the second surfaces of a semiconductor wafer using a plurality of lapping and polishing steps. The method also includes growing passivation oxide layers by use of oxygen plasma on the top of the polished first and second surfaces in order to passivate the semiconductor wafer. Anode contacts are deposited and patterned on top of the first passivation oxide layer, which is on top of the first surface. Cathode contacts, which are either monolithic or patterned, are deposited on top of the second passivation oxide layer, which is on the second surface. Aluminum nitride encapsulation layer can be deposited over the anode contacts and patterned to encapsulate the first passivation oxide layer, while physically exposing a center portion of each anode contact to electrically connect the anode contacts.
    Type: Application
    Filed: October 10, 2017
    Publication date: February 1, 2018
    Inventors: Uri El-Hanany, Adam Densmore, Saeid Taherion, Georgios Prekas, Veeramani Perumal
  • Patent number: 9847369
    Abstract: A method of fabricating a solid state radiation detector method includes mechanically lapping and polishing the first and the second surfaces of a semiconductor wafer using a plurality of lapping and polishing steps. The method also includes growing passivation oxide layers by use of oxygen plasma on the top of the polished first and second surfaces in order to passivate the semiconductor wafer. Anode contacts are deposited and patterned on top of the first passivation oxide layer, which is on top of the first surface. Cathode contacts, which are either monolithic or patterned, are deposited on top of the second passivation oxide layer, which is on the second surface. Aluminum nitride encapsulation layer can be deposited over the anode contacts and patterned to encapsulate the first passivation oxide layer, while physically exposing a center portion of each anode contact to electrically connect the anode contacts.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: December 19, 2017
    Assignee: REDLEN TECHNOLOGIES, INC.
    Inventors: Uri El-Hanany, Adam Densmore, Saeid Taherion, Georgios Prekas, Veeramani Perumal
  • Publication number: 20160240584
    Abstract: A method of fabricating a solid state radiation detector method includes mechanically lapping and polishing the first and the second surfaces of a semiconductor wafer using a plurality of lapping and polishing steps. The method also includes growing passivation oxide layers by use of oxygen plasma on the top of the polished first and second surfaces in order to passivate the semiconductor wafer. Anode contacts are deposited and patterned on top of the first passivation oxide layer, which is on top of the first surface. Cathode contacts, which are either monolithic or patterned, are deposited on top of the second passivation oxide layer, which is on the second surface. Aluminum nitride encapsulation layer can be deposited over the anode contacts and patterned to encapsulate the first passivation oxide layer, while physically exposing a center portion of each anode contact to electrically connect the anode contacts.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 18, 2016
    Inventors: Uri EL-HANANY, Adam DENSMORE, Saeid TAHERION, Georgios PREKAS, Veeramani PERUMAL