Patents by Inventor Veeraraghavan S. Baskar

Veeraraghavan S. Baskar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Controlling active fin height of FinFET device
    Patent number: 10892193
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: January 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva
  • Controlling active fin height of FinFET device using etch protection layer to prevent recess of isolation layer during gate oxide removal
    Patent number: 10770361
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: September 8, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva
  • CONTROLLING ACTIVE FIN HEIGHT OF FINFET DEVICE USING ETCH PROTECTION LAYER TO PREVENT RECESS OF ISOLATION LAYER DURING GATE OXIDE REMOVAL
    Publication number: 20200176332
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Application
    Filed: February 11, 2020
    Publication date: June 4, 2020
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva
  • Controlling active fin height of FinFET device using etch protection layer to prevent recess of isolation layer during gate oxide removal
    Patent number: 10665514
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: May 26, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva
  • CONTROLLING ACTIVE FIN HEIGHT OF FINFET DEVICE USING ETCH PROTECTION LAYER TO PREVENT RECESS OF ISOLATION LAYER DURING GATE OXIDE REMOVAL
    Publication number: 20200027796
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva
  • CONTROLLING ACTIVE FIN HEIGHT OF FINFET DEVICE USING ETCH PROTECTION LAYER TO PREVENT RECESS OF ISOLATION LAYER DURING GATE OXIDE REMOVAL
    Publication number: 20190385916
    Abstract: Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 19, 2019
    Inventors: Yi Song, Veeraraghavan S. Baskar, Jay W. Strane, Ekmini Anuja De Silva