Patents by Inventor Veeresh Babu

Veeresh Babu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240187661
    Abstract: Systems and methods are described for receiving a first request, associated with a first user profile, to record a content item, and storing, at a server and based on the first request, a first copy of the content item, accessible via the first user profile. A second request to record the content item may be received, associated with a second user profile, and content consumption history associated with the second user profile may be identified. Based on such content consumption history, a determination may be made to refrain from storing a second copy of the content item based on the second request. In response to receiving a request, associated with the second user profile, to access the content item, the content item may be played at a device associated with the second user profile based on the stored first copy of the content item.
    Type: Application
    Filed: January 17, 2024
    Publication date: June 6, 2024
    Inventors: Veeresh Babu, Reda Harb
  • Patent number: 11996818
    Abstract: An apparatus includes a differential current-to-voltage conversion circuit that includes an input sampling stage circuit, a differential integration and DC signal cancellation stage circuit, and an amplification and accumulator stage circuit. An input common mode voltage of the differential current-to-voltage conversion circuit is independent of an output common mode voltage of the differential current-to-voltage conversion circuit.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: May 28, 2024
    Assignee: ams International AG
    Inventors: Rahul Thottathil, Ravi Kumar Adusumalli, Parvathy S. J., Veeresh Babu Vulligaddala
  • Patent number: 11993277
    Abstract: Systems and methods are provided for intelligent driving monitoring systems, advanced driver assistance systems and autonomous driving systems, and providing alerts to the driver of a vehicle, based on anomalies detected between driver behavior and environment captured by the outward facing camera. Various aspects of the driver, which may include his direction of sight, point of focus, posture, gaze, is determined by image processing of the upper visible body of the driver, by a driver facing camera in the vehicle. Other aspects of environment around the vehicle captured by the multitude of cameras in the vehicle are used to correlate driver behavior and actions with what is happening outside to detect and warn on anomalies, prevent accidents, provide feedback to the driver, and in general provide a safer driver experience.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: May 28, 2024
    Assignee: NETRADYNE, INC.
    Inventors: David Jonathan Julian, Venkata Sreekanta Reddy Annapureddy, Sandeep Pandya, Arvind Yedla, Dale Alan Willis, Venkata Ramanan Venkatachalam Jayaraman, Suresh Babu Yanamala, Avneesh Agrawal, Veeresh Taranalli, Jaeyoon Kim
  • Patent number: 11917215
    Abstract: Systems and methods are described for receiving a first request, associated with a first user profile, to record a content item, and storing, at a server and based on the first request, a first copy of the content item, accessible via the first user profile. A second request to record the content item may be received, associated with a second user profile, and content consumption history associated with the second user profile may be identified. Based on such content consumption history, a determination may be made to refrain from storing a second copy of the content item based on the second request. In response to receiving a request, associated with the second user profile, to access the content item, the content item may be played at a device associated with the second user profile based on the stored first copy of the content item.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 27, 2024
    Assignee: Rovi Guides, Inc.
    Inventors: Veeresh Babu, Reda Harb
  • Publication number: 20230171442
    Abstract: Systems and methods are described for receiving a first request, associated with a first user profile, to record a content item, and storing, at a server and based on the first request, a first copy of the content item, accessible via the first user profile. A second request to record the content item may be received, associated with a second user profile, and content consumption history associated with the second user profile may be identified. Based on such content consumption history, a determination may be made to refrain from storing a second copy of the content item based on the second request. In response to receiving a request, associated with the second user profile, to access the content item, the content item may be played at a device associated with the second user profile based on the stored first copy of the content item.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Veeresh Babu, Reda Harb
  • Publication number: 20220255536
    Abstract: An apparatus includes a differential current-to-voltage conversion circuit that includes an input sampling stage circuit, a differential integration and DC signal cancellation stage circuit, and an amplification and accumulator stage circuit. An input common mode voltage of the differential current-to-voltage circuit is independent of an output common mode voltage of the differential current-to-voltage circuit.
    Type: Application
    Filed: June 9, 2020
    Publication date: August 11, 2022
    Inventors: Rahul THOTTATHIL, Ravi Kumar ADUSUMALLI, Parvathy S. J., Veeresh Babu VULLIGADDALA
  • Patent number: 10826523
    Abstract: An analog-to-digital converter (10) comprises a first and a second sampling capacitor (24, 25), a first integrator (26), a first and a second input switch (31, 32) coupling a first input terminal (11) and a common mode terminal (39) to a first electrode of the first sampling capacitor (24), a third and a fourth input switch (33, 34) coupling a second input terminal (12) and the common mode terminal (39) to a first electrode of the second sampling capacitor (25), a fifth and a sixth input switch (35, 36) coupling a second electrode of the first sampling capacitor (24) to an amplifier common mode terminal (40) and the first integrator input (27), and a seventh and an eighth input switch (37, 38) coupling a second electrode of the second sampling capacitor (25) to the amplifier common mode terminal (40) and the second integrator input (28).
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: November 3, 2020
    Assignee: ams AG
    Inventors: Ravi Kumar Adusumalli, Sudhakar Singamala, Veeresh Babu Vulligaddala, Rohit Ranganathan, Chandra Nyshadham, Krishna Kanth Avalur, Parvathy Sasikala Jayachandran Pillai
  • Publication number: 20200083901
    Abstract: An analog-to-digital converter (10) comprises a first and a second sampling capacitor (24, 25), a first integrator (26), a first and a second input switch (31, 32) coupling a first input terminal (11) and a common mode terminal (39) to a first electrode of the first sampling capacitor (24), a third and a fourth input switch (33, 34) coupling a second input terminal (12) and the common mode terminal (39) to a first electrode of the second sampling capacitor (25), a fifth and a sixth input switch (35, 36) coupling a second electrode of the first sampling capacitor (24) to an amplifier common mode terminal (40) and the first integrator input (27), and a seventh and an eighth input switch (37, 38) coupling a second electrode of the second sampling capacitor (25) to the amplifier common mode terminal (40) and the second integrator input (28).
    Type: Application
    Filed: May 4, 2018
    Publication date: March 12, 2020
    Inventors: Ravi Kumar ADUSUMALLI, Sudhakar Singamala, Veeresh Babu VULLIGADDALA, Rohit RANGANATHAN, Chandra NYSHADHAM, Krishna Kanth AVALUR, Parvathy SASIKALA JAYACHANDRAN PILLAI
  • Patent number: 9647463
    Abstract: The invention relates to a cell balancing module, particularly for voltage balancing of a stack of batteries. The cell balancing module comprises an interface (SPI, VrefH, VrefL) to input a coded reference voltage (Vref) and input nodes (In1, . . . , InN) for connecting a stack of energy storage cells (BAT1, . . . , BATn). A switching unit (SW) is connected to each of the input nodes (In1, . . . , InN) and a local balancing unit (loc) coupled to the switching unit (SW) and the interface (SPI, VrefH, VrefL). The local balancing unit (loc) is designed to compare the coded reference voltage (Vref) with cell voltages (VBAT1, . . . , VBATn) of the stack of energy storage cells (BAT1, . . . , BATn) to be connected and to charge balance the stack of energy storage cells (BAT1, . . . , BATn) to be connected depending on the comparison of coded reference voltage (Vref) and cell voltages (VBAT1, . . . , VBATn).
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: May 9, 2017
    Assignee: AMS AG
    Inventors: Manfred Brandl, Sandeep Vernekar, Vijay Ele, Sudhakar Singamala, V. Veeresh Babu
  • Publication number: 20140035532
    Abstract: The invention relates to a cell balancing module, particularly for voltage balancing of a stack of batteries. The cell balancing module comprises an interface (SPI, VrefH, VrefL) to input a coded reference voltage (Vref) and input nodes (In1, . . . , InN) for connecting a stack of energy storage cells (BAT1, . . . , BATn). A switching unit (SW) is connected to each of the input nodes (In1, . . . , InN) and a local balancing unit (loc) coupled to the switching unit (SW) and the interface (SPI, VrefH, VrefL). The local balancing unit (loc) is designed to compare the coded reference voltage (Vref) with cell voltages (VBAT1, . . . , VBATn) of the stack of energy storage cells (BAT1, . . . , BATn) to be connected and to charge balance the stack of energy storage cells (BAT1, . . . , BATn) to be connected depending on the comparison of coded reference voltage (Vref) and cell voltages (VBAT1, . . . , VBATn).
    Type: Application
    Filed: February 14, 2012
    Publication date: February 6, 2014
    Applicant: AMS AG
    Inventors: Manfred Brandl, Sandeep Vernekar, Vijay Ele, Sudhakar Singamala, V. Veeresh Babu