Patents by Inventor Vejayakumaran Padavettan

Vejayakumaran Padavettan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PACKAGING ARCHITECTURE WITH CAVITIES FOR EMBEDDED INTERCONNECT BRIDGES
    Publication number: 20230420378
    Abstract: Embodiments of a microelectronic assembly comprise an interposer comprising a dielectric material and a pad of conductive material having at least one of a ceramic liner and fin structures; at least two integrated circuit (IC) dies coupled to the interposer; and a bridge die in the interposer conductively coupled to the at least two IC dies. The bridge die has a first face and an opposing second face, the first face of the bridge die is proximate to the at least two IC dies, and the second face of the bridge die is in contact with the pad.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Applicant: Intel Corporation
    Inventors: Sameer Paital, Gang Duan, Srinivas V. Pietambaram, Kristof Kuwawi Darmawikarta, Tchefor Ndukum, Vejayakumaran Padavettan, Pooja Wadhwa, Brandon C. Marin