Abstract: The present invention relates to a circuit arrangement having the following features: a load transistor having a control connection and a first and second load connection; a drive connection coupled to the control connection of the load transistor and serving for the application of a drive signal; a voltage limiting circuit connected between one of the load connections and the drive connection of the transistor; and a deactivation circuit connected to the voltage limiting circuit and serving for the deactivation of the voltage limiting circuit in a manner dependent on a deactivation signal, which is dependent on a load current through the load transistor and/or on a drive voltage of the load transistor.

Abstract: An electronic circuit includes an electronic switch with a control terminal and a load path between a first and a second load terminal, and a drive circuit with an output terminal coupled to the control terminal of the electronic switch. The drive circuit includes a first input terminal and a second input terminal, a first drive unit coupled between the first input terminal and the output terminal and including a charge pump and drive unit, and a second drive unit coupled between the second input terminal and the output terminal and including a further electronic switch coupled between the output terminal and a terminal for a reference potential.

Abstract: The present invention relates to a circuit arrangement having the following features: a load transistor having a control connection and a first and second load connection, a drive connection coupled to the control connection of the load transistor and serving for the application of a drive signal, a voltage limiting circuit connected between one of the load connections and the drive connection of the transistor, a deactivation circuit connected to the voltage limiting circuit and serving for the deactivation of the voltage limiting circuit in a manner dependent on a deactivation signal, which is dependent on a load current through the load transistor and/or on a drive voltage of the load transistor.

Abstract: The invention relates to a high-voltage diode having a specifically optimized switch-off behavior. A soft recovery behavior of the component can be obtained without increasing the forward losses by adjusting in a specific manner the service life of the charge carriers by irradiating only the n+-conducting cathode emitter (6) side or both sides, i.e. the n+-conducting cathode emitter (6) side and the p+-conducting anode emitter (4) side.

Abstract: The invention realizes a high-voltage diode with a turn-off behavior that is optimized in a targeted manner. By means of an irradiation either only from the side of the n+-conducting cathode emitter (6) or from both sides, i.e. from the side of the n+-conducting cathode emitter (6) and from the side of the p+-conducting anode emitter (4), it is possible to obtain a soft recovery behavior of the component by means of a targeted setting of the lifetime of the charge carriers without in this case increasing the on-state losses.

Abstract: The controllable semiconductor component (1) has a body (10) consisting of doped silicon. Two separate electrodes (3, 4) are connected to the silicon, between which an electric operating voltage (U) of the component (1) is applied. A control electrode (2), to which an electric control voltage (Us) for controlling the component (1) is applied, is insulated from the silicon of the body (10) by electric insulation material (100). According to the invention, the control electrode (2) has two control electrode sections (21, 22), separated from one another by a gap (23). Said semiconductor component can be used for IGBTs and MOS transistors.

Abstract: Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor The present invention relates to a circuit arrangement having the following features: a load transistor (T) having a control connection (G) and a first and second load connection (D, S), a drive connection (IN) coupled to the control connection (G) of the load transistor (T) and serving for the application of a drive signal (Sin), a voltage limiting circuit (10) connected between one (D) of the load connections and the drive connection (G) of the transistor, a deactivation circuit (20) connected to the voltage limiting circuit (10) and serving for the deactivation of the voltage limiting circuit (10) in a manner dependent on a deactivation signal (S22; S23), which is dependent on a load current (Id) through the load transistor (T) and/or on a drive voltage (Vgs) of the load transistor (T). The invention furthermore relates to a method for driving a load transistor.

Abstract: A power switching device has a power switching transistor connected in series in a load circuit with an inductive load portion and a commutation circuit. The commutation circuit is connected in parallel with the gate-drain or base-collector path of the power transistor and has a first Zener diode, which determines the commutation clamping voltage for switching on the power switching transistor during commutation, and an oppositely biased normal diode that is connected in series with the first Zener diode. The commutation circuit further has control elements in order to reduce, during a short time, the commutation clamping voltage at the beginning of each commutation cycle or after an adjustable delay from the beginning of each commutation cycle.

Abstract: A body (1) consisting of a doped semiconductor material with a pn junction (10) and an area (2) of reduced mean free path length (&lgr;r) for free charge carriers is disclosed. Said area (2) has sections (21, 22) which succeed each other in at least one specified direction (x, y, z) and between which there is at least one region (23), containing a mean free path length (&lgr;0) for the free charge carriers that is larger in relation to the reduced mean free path length (&lgr;r).

Abstract: A power switching device has a power switching transistor connected in series in a load circuit with an inductive load portion and a commutation circuit. The commutation circuit is connected in parallel with the gate-drain or base-collector path of the power transistor and has a first Zener diode, which determines the commutation clamping voltage for switching on the power switching transistor during commutation, and an oppositely biased normal diode that is connected in series with the first Zener diode. The commutation circuit further has control elements in order to reduce, during a short time, the commutation clamping voltage at the beginning of each commutation cycle or after an adjustable delay from the beginning of each commutation cycle.

Abstract: A method for producing a body (1) consisting of doped semiconductor material having a defined mean free path length (lambda n) for free charge carriers (CP), and a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n) is disclosed. An epitactic crystal layer (20) consisting of doped semiconductor material is produced on a substrate crystal (10) consisting of semiconductor material having the defined mean free path length (lambda n), said crystal layer having, at least locally, a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n). The body (1) can also be produced by joining two crystal bodies (10′, 10″) consisting of doped semiconductor material.

Abstract: The controllable semiconductor component (1) has a body (10) consisting of doped silicon. Two separate electrodes (3, 4) are connected to the silicon, between which an electric operating voltage (U) of the component (1) is applied. A control electrode (2), to which an electric control voltage (Us) for controlling the component (1) is applied, is insulated from the silicon of the body (10) by electric insulation material (100). According to the invention, the control electrode (2) has two control electrode sections (21, 22), separated from one another by a gap (23). Said semiconductor component can be used for IGBTs and MOS transistors.

Abstract: A body (1) consisting of a doped semiconductor material with a pn junction (10) and an area (2) of reduced mean free path length (&lgr;r) for free charge carriers is disclosed. Said area (2) has sections (21, 22) which succeed each other in at least one specified direction (x, y, z) and between which there is at least one region (23), containing a mean free path length (&lgr;0) for the free charge carriers that is larger in relation to the reduced mean free path length (&lgr;r).