Patents by Inventor Vemmond Jeng Hung NG

Vemmond Jeng Hung NG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072009
    Abstract: Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 29, 2024
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Erik Nino TOLENTINO, Vemmond Jeng Hung NG, Shutesh KRISHNAN
  • Patent number: 11830856
    Abstract: Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: November 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong Chew, Erik Nino Tolentino, Vemmond Jeng Hung Ng, Shutesh Krishnan
  • Publication number: 20230369176
    Abstract: Implementations described herein are related to a semiconductor device package having an improved baseplate. In such an improved baseplate, there is a recess cut out of a region of a surface of the baseplate such that the recess has a first sidewall having a first thickness above a recess base and a second sidewall having a second thickness above the recess base. A substrate, e.g., a direct bonded copper (DBC) substrate, may be attached to the baseplate at a recess base using, e.g., a solder layer between the recess base and a surface of the substrate.
    Type: Application
    Filed: July 24, 2023
    Publication date: November 16, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Vemmond Jeng Hung NG
  • Publication number: 20230326901
    Abstract: According to an aspect, a power electronic module includes a substrate, a semiconductor die coupled to the substrate, and a clip member configured to secure the semiconductor die to the substrate, where the clip member includes a base portion having a surface coupled to the semiconductor die, an extender portion that extends from the base portion, where the extender portion includes a contact portion coupled to the substrate, and at least one protrusion that extends from the base portion or the extender portion.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 12, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Vemmond Jeng Hung Ng
  • Patent number: 11735504
    Abstract: Implementations described herein are related to a semiconductor device package having an improved baseplate. In such an improved baseplate, there is a recess cut out of a region of a surface of the baseplate such that the recess has a first sidewall having a first thickness above a recess base and a second sidewall having a second thickness above the recess base. A substrate, e.g., a direct bonded copper (DBC) substrate, may be attached to the baseplate at a recess base using, e.g., a solder layer between the recess base and a surface of the substrate.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: August 22, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Vemmond Jeng Hung Ng
  • Publication number: 20230180410
    Abstract: A module includes a power circuit enclosed in a casing. A first power terminal and a second power terminal of the power circuit each extend to an exterior of the casing. The first power terminal and the second power terminal separated by a gap are disposed in a stack on the exterior of the casing.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 8, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Vemmond Jeng Hung NG, Yushuang YAO, Chee Hiong CHEW
  • Publication number: 20230027138
    Abstract: A method includes attaching a power electronic substrate to a bottom of a frame. The frame has a box-like rectangular shape with an open top and an open bottom. The method further includes disposing an external conductive terminal on the frame. The external conductive terminal has at least one terminal stub that extends on to the front surface of the power electronic substrate. The method further includes welding the at least one terminal stub to at least one circuit trace disposed on the front surface of the power electronic substrate.
    Type: Application
    Filed: June 20, 2022
    Publication date: January 26, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Vemmond Jeng Hung NG, Chuncao NIU, Sravan VANAPARTHY
  • Patent number: 11482468
    Abstract: A method includes disposing a series of protrusions on a rectangular side panel of an open four-sided box-like structure in a frame, and attaching an electronic substrate to the frame. The electronic substrate carries one or more circuit components. The series of protrusions acts as a spring-like compensator to compensate plastic deformation, twisting or warping of the frame, and to limit propagation of stress to the electronic substrate via the frame.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: October 25, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Vemmond Jeng Hung Ng, Chee Hiong Chew, Qing Yang
  • Publication number: 20220157696
    Abstract: Implementations described herein are related to a semiconductor device package having an improved baseplate. In such an improved baseplate, there is a recess cut out of a region of a surface of the baseplate such that the recess has a first sidewall having a first thickness above a recess base and a second sidewall having a second thickness above the recess base. A substrate, e.g., a direct bonded copper (DBC) substrate, may be attached to the baseplate at a recess base using, e.g., a solder layer between the recess base and a surface of the substrate.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Vemmond Jeng Hung NG
  • Publication number: 20210343620
    Abstract: A method includes disposing a series of protrusions on a rectangular side panel of an open four-sided box-like structure in a frame, and attaching an electronic substrate to the frame. The electronic substrate carries one or more circuit components. The series of protrusions acts as a spring-like compensator to compensate plastic deformation, twisting or warping of the frame, and to limit propagation of stress to the electronic substrate via the frame.
    Type: Application
    Filed: May 4, 2020
    Publication date: November 4, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Vemmond Jeng Hung NG, Chee Hiong CHEW, Qing YANG
  • Publication number: 20200286865
    Abstract: Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
    Type: Application
    Filed: January 17, 2020
    Publication date: September 10, 2020
    Inventors: Chee Hiong CHEW, Erik Nino TOLENTINO, Vemmond Jeng Hung NG, Shutesh KRISHNAN