Abstract: A switch for use with an InfiniBand network having a management port adapted to arbitrate among equal priority signals requesting attention from ports on the switch. In particular, the management port included three registers that are used to arbitrate between the requests. The first register stores an indication of each type of signal from each port issuing the signal. The second register to indicate which single type of signal from which port has the priority to be handled next. The third register that indicates which signal is to be handled next or is currently being handled.

Abstract: An infiniband architecture switch, includes a plurality of ports each configured to receive switch parameters, identify at least one data-packet error condition responsive to the switch parameters, generate a trap-initialization signal when the at least one data-packet error condition matches a trap-error condition, and a switch manager configured to receive the trap-initialization signal. A method for generating a switch manager control signal includes identifying at least one data-packet error condition in an infiniband architecture switch, determining when the at least one data-packet error condition matches a trap-error condition, generating a trap-initialization signal responsive to the trap-error condition, and forwarding the trap-initialization signal to a switch manager.

Abstract: An infiniband architecture switch, includes an error checker having a plurality of inputs and an output signal bus, the error checker configured to identify at least one data-packet error condition responsive to signals at the plurality of inputs, and an error recorder communicatively coupled to the error checker via the output signal bus wherein the error recorder contains a representation of data-packet errors. A method for identifying data-packet errors includes, monitoring for the occurrence of at least one data-packet error condition in a port of an infiniband architecture switch, encoding a representation of the at least one data-packet error condition, and forwarding the representation to an error recorder.

Abstract: An infiniband architecture switch, includes a plurality of ports each configured to receive switch parameters, identify at least one data-packet error condition responsive to the switch parameters, generate a trap-initialization signal when the at least one data-packet error condition matches a trap-error condition, and a switch manager configured to receive the trap-initialization signal. A method for generating a switch manager control signal includes identifying at least one data-packet error condition in an infiniband architecture switch, determining when the at least one data-packet error condition matches a trap-error condition, generating a trap-initialization signal responsive to the trap-error condition, and forwarding the trap-initialization signal to a switch manager.

Abstract: A method and apparatus for performing efficient reseeks in an optical storage device. As data sectors are read by the optical storage device, address information corresponding to sectors being processed by the optical storage device is stored in a stack. The stack may be composed of shift registers that shift the address information of new sectors down the stack as they are read. When an interrupt occurs, a selector determines which stack location contains address information for the sector being processed, and transfers the address information to a register. The address information is held in the register until it is accessed by a microprocessor. The microprocessor uses the address information to determine a reseek location, and causes the sector being processed to be read again.

Abstract: Internal memory elements of vendor-specific network devices are made available using standardized network protocol packets. In accordance with the invention, reserved values of an attribute identifier field may be mapped to implementation-specific nodes within a particular manufacturer's network device, while a set of reserved attribute modifier values may be mapped to implementation-specific memory elements within the node specified by the value of the attribute identifier. Access to implementation-specific device internals is therefore made possible using the standard network protocol.

Abstract: A memory controller comprises a programmable interface coupled to address circuitry. The programmable interface receives a configuration signal into the memory controller indicating a selected address configuration. The address circuitry processes system addresses based on the selected address configuration to generate memory addresses. The configuration signal may also indicate a selected memory configuration, and the address circuitry processes the system addresses based on the selected memory configuration to generate memory device selections.

Abstract: A switch for use with an InfiniBand network having a management port adapted to arbitrate among equal priority signals requesting attention from ports on the switch. In particular, the management port included three registers that are used to arbitrate between the requests. The first register stores an indication of each type of signal from each port issuing the signal. The second register to indicate which single type of signal from which port has the priority to be handled next. The third register that indicates which signal is to be handled next or is currently being handled.

Abstract: A method and apparatus for performing efficient reseeks in an optical storage device. As data sectors are read by the optical storage device, address information corresponding to sectors being processed by the optical storage device is stored in a stack. The stack may be composed of shift registers that shift the address information of new sectors down the stack as they are read. When an interrupt occurs, a selector determines which stack location contains address information for the sector being processed, and transfers the address information to a register. The address information is held in the register until it is accessed by a microprocessor. The microprocessor uses the address information to determine a reseek location, and causes the sector being processed to be read again.

Abstract: A method and apparatus for automatically identifying the format of a sector in an optical storage device. Information on an optical disc is separated into data and subcode streams. The type of optical data is identified, and a first signal is generated to represent the type. Next, if the type is CD-ROM, the mode is identified, and a second signal is generated to represent the mode. Thirdly, if the mode is Mode-2 CD-ROM, the form is identified, and a third signal is generated to represent the form. A single signal may also be used to represent the type, mode, and form. In a CD embodiment, the type is identified by polling a type indicator bit, the mode is identified by polling the mode indicator bits, and the form is identified by comparing a first set of subheader bytes to a second set of subheader bytes, and polling a form indicator bit.

Abstract: A method and apparatus for configuring a sector map in an optical storage device. Format identification information is used to generate a sector format word. The sector format word is stored in a sector map in buffer memory. Upon receiving a data retrieval request from a host, the sector format word is decoded, and the data field size is adjusted to conform with the format information contained in the decoded sector format word.