Patents by Inventor Venkata Krishna Rao VANGARA

Venkata Krishna Rao VANGARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hot carrier injection fuse memory
    Patent number: 11348651
    Abstract: Memory cell circuitry is disclosed. The memory cell circuitry includes a first transistor configured to have a threshold voltage of the first transistor modulated by hot carrier injection, a second transistor coupled to the first transistor and configured to have a threshold voltage of the second transistor modulated by hot carrier injection, a word line coupled to a gate of the first transistor and to a gate of the second transistor, a first bit line coupled to the first transistor and a second bit line coupled to the second transistor. In addition, the memory cell circuitry includes a source line coupled to the drain of the first transistor and to the drain of the second transistor, the word line and the source line configured to cause hot carrier injection (HCI) into the first transistor when a first supply voltage is applied to the word line and the source line, and the second bit line is floated and the first bit line is grounded.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: May 31, 2022
    Assignee: Intel Corporation
    Inventors: Sarvesh Kulkarni, Vincent Dorgan, Inanc Meric, Venkata Krishna Rao Vangara, Uddalak Bhattacharya, Jeffrey Hicks
  • HOT CARRIER INJECTION FUSE MEMORY
    Publication number: 20200105356
    Abstract: Memory cell circuitry is disclosed. The memory cell circuitry includes a first transistor configured to have a threshold voltage of the first transistor modulated by hot carrier injection, a second transistor coupled to the first transistor and configured to have a threshold voltage of the second transistor modulated by hot carrier injection, a word line coupled to a gate of the first transistor and to a gate of the second transistor, a first bit line coupled to the first transistor and a second bit line coupled to the second transistor. In addition, the memory cell circuitry includes a source line coupled to the drain of the first transistor and to the drain of the second transistor, the word line and the source line configured to cause hot carrier injection (HCI) into the first transistor when a first supply voltage is applied to the word line and the source line, and the second bit line is floated and the first bit line is grounded.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Sarvesh KULKARNI, Vincent DORGAN, Inanc MERIC, Venkata Krishna Rao VANGARA, Uddalak BHATTACHARYA, Jeffrey HICKS