Patents by Inventor Venkata Naga Lakshman Pasala

Venkata Naga Lakshman Pasala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12148495
    Abstract: A system includes a plurality of memory dice and a processing device coupled to the plurality of memory dice. The processing device is to determine whether an error correcting code (ECC) check of ECC-protected data read from a die of the plurality of memory dice results in detecting an error. In response to detecting the error from the ECC-protected data, the processing device performs a confirmation check that the error is a result of a defect in the die. In response to the confirmation check confirming the die is defective, the processing device ignores a temperature value from the die when determining whether to trigger a thermal-related operation.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: November 19, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu
  • Patent number: 12086062
    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number.
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: September 10, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
  • Publication number: 20240248623
    Abstract: A front-end firmware component of a memory sub-system receives a first request to perform a first set of initialization operations and initiates a first set of initialization operations for the front-end component in parallel with initiating a second set of initialization operations for a back-end component. Responsive to completing the first set of initialization operations, the front-end component sends a first notification to a host computer system to indicate that the front-end component is available to respond to requests for configuration data associated with the memory sub-system, receives a second request from the host computer system for a configuration data associated with the memory sub-system, and responsive to receiving the second request from the host computer system before the back-end component has completed the second set of initialization operations, provides the configuration data to the host computer system.
    Type: Application
    Filed: April 4, 2024
    Publication date: July 25, 2024
    Inventors: Ximin Shan, Venkata Naga Lakshman Pasala, Noorshaheen Mavungal Noorudheen
  • Patent number: 11977755
    Abstract: A front-end firmware component of a memory sub-system receives a first request to perform a first set of initialization operations and initiates a first set of initialization operations for the front-end component in parallel with initiating a second set of initialization operations for a back-end component. Responsive to completing the first set of initialization operations, the front-end component sends a first notification to a host computer system to indicate that the front-end component is available to respond to requests for configuration data associated with the memory sub-system, receives a second request from the host computer system for a configuration data associated with the memory sub-system, and responsive to receiving the second request from the host computer system before the back-end component has completed the second set of initialization operations, provides the configuration data to the host computer system.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ximin Shan, Venkata Naga Lakshman Pasala, Noorshaheen Mavungal Noorudheen
  • Publication number: 20240037033
    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 1, 2024
    Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
  • Patent number: 11782831
    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: October 10, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
  • Patent number: 11709538
    Abstract: A processing device in a memory sub-system detects a preemptive power loss condition in the memory sub-system and, in response, causes operations of a local media controller associated with a memory device in the memory sub-system to be suspended, wherein responsive to being suspended, the local media controller to perform power loss handling operations to complete a subset of a plurality of pending memory access operations, and wherein to perform the power loss handling operations, the local media controller to complete the subset of the plurality of pending memory access operations for which an acknowledgment signal has been sent to a requestor. The processing device further detects a full power loss and restore condition in the memory sub-system, responsive to detecting the full power loss and restore condition, initializes the memory device and causes operations of the local media controller to resume.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: July 25, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Frederick Adi, Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu, Paul Stonelake, Nagireddy Chodem
  • Publication number: 20230207042
    Abstract: A system includes a plurality of memory dice and a processing device coupled to the plurality of memory dice. The processing device is to determine whether an error correcting code (ECC) check of ECC-protected data read from a die of the plurality of memory dice results in detecting an error. In response to detecting the error from the ECC-protected data, the processing device performs a confirmation check that the error is a result of a defect in the die. In response to the confirmation check confirming the die is defective, the processing device ignores a temperature value from the die when determining whether to trigger a thermal-related operation.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu
  • Publication number: 20230131347
    Abstract: A plurality of temperature values of the memory device is received. A temperature value of the plurality of temperature values that satisfies a thermal throttling threshold of a plurality of thermal throttling thresholds is determined, wherein each thermal throttling threshold of the plurality of thermal throttling thresholds triggers a corresponding thermal throttling state of the memory device. In response to determining that the temperature value satisfies the respective thermal throttling threshold, a thermal throttling operation associated with the corresponding thermal throttling state is performed.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 27, 2023
    Inventors: Huapeng G. Guan, Horia C. Simionescu, Jiangli Zhu, Venkata Naga Lakshman Pasala, Wei Wang
  • Patent number: 11621049
    Abstract: A system include multiple memory dice and a processing device coupled to the multiple memory dice. The processing device is to perform operations, including: reading temperature values from registers at multiple memory dice, wherein each temperature value is associated with a temperature at a respective die of the multiple memory dice; reading error-correcting code (ECC)-protected data from the multiple memory dice; determining whether an ECC check of the ECC-protected data results in detecting an error; in response to detecting the error from the ECC-protected data for a die of the multiple memory dice, performing a confirmation check that the error is a result of a defect in the die; and in response to the confirmation check confirming the die is defective, ignoring a temperature value from the die when determining whether to trigger a thermal-related operation.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: April 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu
  • Publication number: 20230064014
    Abstract: A front-end firmware component of a memory sub-system receives a first request to perform a first set of initialization operations, where the front-end component communicates with a back-end component in a data path associated with a memory device of the memory sub-system; responsive to receiving the first request, initiates the a first set of initialization operations for the front-end component in parallel with initiating a second set of initialization operations for the back-end component; responsive to completing the first set of initialization operations, sends a first notification to a host computer system to indicate that the front-end component is available to respond to requests for configuration data associated with the memory sub-system; receives a second request from the host computer system for a configuration data associated with the memory sub-system, where the second request is received before the back-end component has completed the second set of initialization operations; and responsive to r
    Type: Application
    Filed: July 29, 2022
    Publication date: March 2, 2023
    Inventors: Ximin Shan, Venkata Naga Lakshman Pasala, Noorshaheen Mavungal Noorudheen
  • Publication number: 20230065617
    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.
    Type: Application
    Filed: September 1, 2021
    Publication date: March 2, 2023
    Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
  • Publication number: 20220155840
    Abstract: A processing device in a memory sub-system detects a preemptive power loss condition in the memory sub-system and, in response, causes operations of a local media controller associated with a memory device in the memory sub-system to be suspended, wherein responsive to being suspended, the local media controller to perform power loss handling operations to complete a subset of a plurality of pending memory access operations, and wherein to perform the power loss handling operations, the local media controller to complete the subset of the plurality of pending memory access operations for which an acknowledgment signal has been sent to a requestor. The processing device further detects a full power loss and restore condition in the memory sub-system, responsive to detecting the full power loss and restore condition, initializes the memory device and causes operations of the local media controller to resume.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 19, 2022
    Inventors: Frederick Adi, Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu, Paul Stonelake, Nagireddy Chodem
  • Publication number: 20220101940
    Abstract: A system include multiple memory dice and a processing device coupled to the multiple memory dice. The processing device is to perform operations, including: reading temperature values from registers at multiple memory dice, wherein each temperature value is associated with a temperature at a respective die of the multiple memory dice; reading error-correcting code (ECC)-protected data from the multiple memory dice; determining whether an ECC check of the ECC-protected data results in detecting an error; in response to detecting the error from the ECC-protected data for a die of the multiple memory dice, performing a confirmation check that the error is a result of a defect in the die; and in response to the confirmation check confirming the die is defective, ignoring a temperature value from the die when determining whether to trigger a thermal-related operation.
    Type: Application
    Filed: August 9, 2021
    Publication date: March 31, 2022
    Inventors: Venkata Naga Lakshman Pasala, Wei Wang, Jiangli Zhu