Patents by Inventor Venkata Naveen Kumar Neelapala

Venkata Naveen Kumar Neelapala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11569353
    Abstract: An apparatus comprises active word lines extending within a semiconductive material, passing word lines extending adjacent to the active word lines within the semiconductive material, isolation regions adjacent to the passing word lines, and a band offset material adjacent to the passing word lines and the isolation regions. The semiconductive material exhibits a first bandgap and the band offset material exhibits a second, different bandgap. Related methods and systems are also described.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: January 31, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Venkata Naveen Kumar Neelapala, Deepak Chandra Pandey
  • Patent number: 11515311
    Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a first trench and a second trench formed in a semiconductor substrate material, where the first and second trenches are adjacent and separated by the semiconductor substrate material. The apparatus includes a metallic material formed to a first height in the first trench that is less than, relative to the semiconductor substrate material, a second height of the metallic material formed in the second trench and a polysilicon material formed over the metallic material in the first trench to a first depth greater than, relative to the semiconductor substrate material, a second depth of the polysilicon material formed over the metallic material in the second trench. The greater first depth of the polysilicon material formed in the first trench reduces transfer of charge by way of the metallic material in the first trench.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: November 29, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Venkata Naveen Kumar Neelapala, Deepak Chandra Pandey, Naveen Kaushik
  • Patent number: 11430793
    Abstract: A microelectronic device comprises a first pillar of a semiconductive material, a second pillar of the semiconductive material adjacent to the first pillar of the semiconductive material, an active word line extending between the first pillar and the second pillar, and a passing word line extending on a side of the second pillar opposite the active word line, the passing word line extending into an isolation region within the semiconductive material, the isolation region comprising a lower portion and an upper portion having a substantially circular cross-sectional shape and a larger lateral dimension than the lower portion. Related microelectronic devices, electronic systems, and methods are also described.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: August 30, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Chandra Pandey, Venkata Naveen Kumar Neelapala, Haitao Liu
  • Publication number: 20220246727
    Abstract: An apparatus comprises active word lines extending within a semiconductive material, passing word lines extending adjacent to the active word lines within the semiconductive material, isolation regions adjacent to the passing word lines, and a band offset material adjacent to the passing word lines and the isolation regions. The semiconductive material exhibits a first bandgap and the band offset material exhibits a second, different bandgap. Related methods and systems are also described.
    Type: Application
    Filed: February 2, 2021
    Publication date: August 4, 2022
    Inventors: Venkata Naveen Kumar Neelapala, Deepak Chandra Pandey
  • Publication number: 20210391337
    Abstract: A microelectronic device comprises a first pillar of a semiconductive material, a second pillar of the semiconductive material adjacent to the first pillar of the semiconductive material, an active word line extending between the first pillar and the second pillar, and a passing word line extending on a side of the second pillar opposite the active word line, the passing word line extending into an isolation region within the semiconductive material, the isolation region comprising a lower portion and an upper portion having a substantially circular cross-sectional shape and a larger lateral dimension than the lower portion. Related microelectronic devices, electronic systems, and methods are also described.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Inventors: Deepak Chandra Pandey, Venkata Naveen Kumar Neelapala, Haitao Liu
  • Publication number: 20210183865
    Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a first trench and a second trench formed in a semiconductor substrate material, where the first and second trenches are adjacent and separated by the semiconductor substrate material. The apparatus includes a metallic material formed to a first height in the first trench that is less than, relative to the semiconductor substrate material, a second height of the metallic material formed in the second trench and a polysilicon material formed over the metallic material in the first trench to a first depth greater than, relative to the semiconductor substrate material, a second depth of the polysilicon material formed over the metallic material in the second trench. The greater first depth of the polysilicon material formed in the first trench reduces transfer of charge by way of the metallic material in the first trench.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 17, 2021
    Inventors: Venkata Naveen Kumar Neelapala, Deepak Chandra Pandey, Naveen Kaushik