Abstract: A method of a decryptor including receiving, from an encryptor of an electronic device, a core dump that has been encrypted with a symmetric key generated by the encryptor, and core dump metadata, extracting crash metadata from the core dump metadata, transmitting the crash metadata to a remote key server for regenerating the symmetric key, obtaining, from the remote key server, a regenerated symmetric key based the crash metadata, and decrypting the core dump based on the regenerated symmetric key and the crash metadata.

Abstract: A canary update method according to some embodiments is disclosed. The canary update method includes executing, by a processor configured to process tasks including the canary, computer program instructions to perform operations including extracting, by a processor, a first value from an array including N values, setting the canary to the first value, determining that the canary is updated based on a canary flag value of a first task, extracting, when determined that the canary is updated, a second value from the array, and updating the canary of the first task to the second value. The processor is configured to access a memory through a mapping circuit, and the mapping circuit includes mapping information between a physical memory region in the memory corresponding to the first task and a virtual memory region associated with the mapping circuit.

Abstract: A method for preventing a task-signal deadlock arising due to contention for a mutex in a real-time operating system (RTOS) includes detecting, by a processing unit, a signal notification sent to a task for execution of a signal handler; identifying, by the processing unit, a mutex to be acquired by the signal handler, when the signal notification is detected; determining whether the identified mutex has been acquired by the task; and utilizing, by the processing unit, an alternative stack for execution of the signal handler, in response to determining that the mutex has been acquired by the task, for preventing a task-signal deadlock during the execution.

Abstract: Various example embodiments relate to methods, devices, and/or systems for executing a plurality of tasks in a computer operating environment. The method comprises monitoring a remaining execution time of a current task executing on the processing circuitry, and performing, by the processing circuitry, pre-emption of the current task based on the remaining execution time of the current task and a desired execution threshold time, the desired execution threshold time being one of a desired value based on one or more configuration parameter of the current task or a dynamic value determined based on information related to ongoing activities in the computer operating environment.

Abstract: A method for preventing a task-signal deadlock arising due to contention for a mutex in a real-time operating system (RTOS) includes detecting, by a processing unit, a signal notification sent to a task for execution of a signal handler; identifying, by the processing unit, a mutex to be acquired by the signal handler, when the signal notification is detected; determining whether the identified mutex has been acquired by the task; and utilizing, by the processing unit, an alternative stack for execution of the signal handler, in response to determining that the mutex has been acquired by the task, for preventing a task-signal deadlock during the execution.

Abstract: A method of generating a core dump in a User Equipment (UE) may include detecting, using at least one processor, a trigger, the trigger including an instruction to generate a core dump of the UE. The method may further include classifying, using the at least one processor, data stored in memory of the UE as Read-Write (RW) data or Read Only (RO) data. The method may further include generating, using the at least one processor, a partial core dump based on the RW data of the memory.

Abstract: A method for managing memory leaks in a memory device includes grouping, by a garbage collection system, a plurality of similar memory allocations of the memory device into one or more Unique Fixed Identifiers (UFIs); identifying, by the garbage collection system, one of the one or more UFIs having a highest accumulated memory size and adding each of the plurality of memory allocations in the identified one of the one or more UFIs into a Potential Leak Candidate List (PLCL); identifying, by the garbage collection system, the memory leaks in the memory device by identifying unreferenced memory addresses associated with the plurality of memory allocations in the PLCL; and releasing, by the garbage collection system, the identified unreferenced memory addresses associated with the plurality of memory allocations corresponding to the memory leaks into the memory device.

Abstract: A method for managing memory leaks in a memory device includes grouping, by a garbage collection system, a plurality of similar memory allocations of the memory device into one or more Unique Fixed Identifiers (UFIs); identifying, by the garbage collection system, one of the one or more UFIs having a highest accumulated memory size and adding each of the plurality of memory allocations in the identified one of the one or more UFIs into a Potential Leak Candidate List (PLCL); identifying, by the garbage collection system, the memory leaks in the memory device by identifying unreferenced memory addresses associated with the plurality of memory allocations in the PLCL; and releasing, by the garbage collection system, the identified unreferenced memory addresses associated with the plurality of memory allocations corresponding to the memory leaks into the memory device.

Abstract: An apparatus is configured to collect information related to a first activity and analyze the collected information to determine decision data. The information is stored in a first list of the source processing core for scheduling execution of the activity by a destination processing core to avoid cache misses. The source processing core is configured to transmit information related to the decision data using an interrupt, to a second list associated with a scheduler of the destination processing core, if the destination processing core is currently executing a second activity having a lower priority than the first activity.

Abstract: Systems and methods are described for simultaneously accessing a plurality of services on Wi-Fi. The method comprises registering a first and second Media Access Control (MAC) identification (ID) with a first and second IP Multimedia System (IMS), by use of a User Equipment (UE). The UE comprises a first MAC ID associated with a first Subscriber Identification Module (SIM) card and a second MAC ID associated with a second SIM card. Use of a first service through a first Access Point (AP) without interrupting a second service may be available with registration of a first and second MAC ID.

Abstract: A multicore computing device includes a memory and a processor coupled to the memory. The processor includes plural cores and a multiple input multiple output (MIMO) block coupled to the cores. The MIMO block receives a halt request from a first core of the cores, transmits a core-halt request to one or more other cores other than the first core, to halt execution of the one or more other cores, and permits the first core to lock with a shared resource.

Abstract: A method performed by a User Equipment (UE) for managing sub-flow communications is provided, the method includes selecting a sub-flow among a plurality of sub-flows of the UE based on a set of parameters associated with each of the plurality of sub-flows, and transmitting a plurality of Transmission Control Protocol (TCP) acknowledgement messages in a single frame through the selected sub-flow, the plurality of TCP acknowledgement messages being associated with the plurality of sub-flows.

Abstract: A code coverage method for an embedded System on Chip (SoC) includes detecting a presence of a utility function in target source code; adding a hook function to the target source code; and recording at least one property of the utility function based on the hook function in a bit array in a memory of the SoC. The method may further include extracting at least one recorded property from bit arrays in the memory; and generating a code coverage report based on an analysis of the extracted properties.

Abstract: A method of generating a core dump in a User Equipment (UE) may include detecting, using at least one processor, a trigger, the trigger including an instruction to generate a core dump of the UE. The method may further include classifying, using the at least one processor, data stored in memory of the UE as Read-Write (RW) data or Read Only (RO) data. The method may further include generating, using the at least one processor, a partial core dump based on the RW data of the memory.

Abstract: Systems and methods are described for simultaneously accessing a plurality of services on Wi-Fi. The method comprises registering a first and second Media Access Control (MAC) identification (ID) with a first and second IP Multimedia System (IMS), by use of a User Equipment (UE). The UE comprises a first MAC ID associated with a first Subscriber Identification Module (SIM) card and a second MAC ID associated with a second SIM card.

Abstract: A method for preventing a task-signal deadlock arising due to contention for a mutex in a real-time operating system (RTOS) includes detecting, by a processing unit, a signal notification sent to a task for execution of a signal handler; identifying, by the processing unit, a mutex to be acquired by the signal handler, when the signal notification is detected; determining whether the identified mutex has been acquired by the task; and utilizing, by the processing unit, an alternative stack for execution of the signal handler, in response to determining that the mutex has been acquired by the task, for preventing a task-signal deadlock during the execution.

Abstract: Systems and methods are described for simultaneously accessing a plurality of services on Wi-Fi. The method comprises registering a first and second Media Access Control (MAC) identification (ID) with a first and second IP Multimedia System (IMS), by use of a User Equipment (UE). The UE comprises a first MAC ID associated with a first Subscriber Identification Module (SIM) card and a second MAC ID associated with a second SIM card. Use of a first service through a first Access Point (AP) without interrupting a second service may be available with registration of a first and second MAC ID.

Abstract: A code coverage method for an embedded System on Chip (SoC) includes detecting a presence of a utility function in target source code; adding a hook function to the target source code; and recording at least one property of the utility function based on the hook function in a bit array in a memory of the SoC. The method may further include extracting at least one recorded property from bit arrays in the memory; and generating a code coverage report based on an analysis of the extracted properties.

Abstract: Various example embodiments herein provide a computerized method for scheduling a plurality of tasks for an operating system on a multicore processor. The method includes identifying the plurality of tasks to be executed on the multicore processor and determining a task schedule for scheduling of the plurality of tasks by providing a higher preference to the CPU-bound task than the non CPU-bound task. Further, the method includes scheduling the plurality of tasks on the multicore processor based on the task schedule.

Abstract: An apparatus is configured to collect information related to a first activity and analyze the collected information to determine decision data. The information is stored in a first list of the source processing core for scheduling execution of the activity by a destination processing core to avoid cache misses. The source processing core is configured to transmit information related to the decision data using an interrupt, to a second list associated with a scheduler of the destination processing core, if the destination processing core is currently executing a second activity having a lower priority than the first activity.