Patents by Inventor Venkata Ramanan R
Venkata Ramanan R has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240213981Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.Type: ApplicationFiled: March 8, 2024Publication date: June 27, 2024Inventors: Nitin AGARWAL, Kunal Suresh KARANJKAR, Venkata Ramanan R
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Patent number: 11955964Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.Type: GrantFiled: February 8, 2021Date of Patent: April 9, 2024Assignee: Texas Instruments IncorporatedInventors: Nitin Agarwal, Kunal Suresh Karanjkar, Venkata Ramanan R
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Patent number: 11848678Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: GrantFiled: September 13, 2022Date of Patent: December 19, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
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Publication number: 20230308055Abstract: An example device includes: switch circuitry configured to: connect, in a first state based on a control signal, a first switch input to a first switch output and a second switch input to a second switch output; and connect, in a second state based on the control signal, the first switch input to the second switch output and the second switch input to the first switch output; an operational amplifier configured to: generate, in response to the control signal, a first voltage based on a gain and the connections in the first state; and generate, in response to the control signal, a second voltage based on the gain and the connections in the second state; and an Analog to Digital Converter (ADC) configured to convert the first voltage and the second voltage into a digital value based on a multiplication of the input voltage and the gain.Type: ApplicationFiled: August 29, 2022Publication date: September 28, 2023Inventors: Kunal Karanjkar, Venkata Ramanan R, Srinivasa BS Chakravarthy, Per Torstein Roine
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Publication number: 20230006663Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: ApplicationFiled: September 13, 2022Publication date: January 5, 2023Applicant: Texas Instruments IncorporatedInventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
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Patent number: 11444612Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: GrantFiled: April 6, 2021Date of Patent: September 13, 2022Assignee: Texas Instruments IncorporatedInventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
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Publication number: 20210226619Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: ApplicationFiled: April 6, 2021Publication date: July 22, 2021Inventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R.
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Publication number: 20210167775Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.Type: ApplicationFiled: February 8, 2021Publication date: June 3, 2021Inventors: Nitin AGARWAL, Kunal Suresh KARANJKAR, Venkata Ramanan R
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Patent number: 10972086Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: GrantFiled: April 8, 2019Date of Patent: April 6, 2021Assignee: Texas Instruments IncorporatedInventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
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Patent number: 10917090Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.Type: GrantFiled: December 2, 2019Date of Patent: February 9, 2021Assignee: Texas Instruments IncorporatedInventors: Nitin Agarwal, Kunal Suresh Karanjkar, Venkata Ramanan R
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Publication number: 20200321952Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.Type: ApplicationFiled: April 8, 2019Publication date: October 8, 2020Inventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R