Patents by Inventor Venkatesh Babu Chitlur Srinivasa

Venkatesh Babu Chitlur Srinivasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10592273
    Abstract: A method and apparatus are provided in which a source and target perform bidirectional forwarding of traffic while a migration guest is being transferred from the source to the target. In some examples, the migration guest is exposed to the impending migration and takes an action in response. A virtual network programming controller informs other devices in the network of the change, such that those devices may communicate directly with the migration guest on the target host. According to some examples, an “other” virtual network device in communication with the controller and the target host facilitates the seamless migration. In such examples, the forwarding may be performed only until the other virtual machine receives an incoming packet from the target host, and then the other virtual machine resumes communication with the migration guest on the target host.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 17, 2020
    Assignee: Google LLC
    Inventors: Brian Matthew Fahs, Jinnah Dylan Hosein, Venkatesh Babu Chitlur Srinivasa, Guy Shefner, Roy Donald Bryant, Uday Ramakrishna Naik, Francis Edward Swiderski, III, Nan Hua
  • Patent number: 10162686
    Abstract: A cache affinity and processor utilization technique efficiently load balances work in a storage input/output (I/O) stack among a plurality of processors and associated processor cores of a node. The storage I/O stack employs one or more non-blocking messaging kernel (MK) threads that execute non-blocking message handlers (i.e., non-blocking services). The technique load balances work between the processor cores sharing a last level cache (LLC) (i.e., intra-LLC processor load balancing), and load balances work between the processors having separate LLCs (i.e., inter-LLC processor load balancing). The technique may allocate a predetermined number of logical processors for use by an MK scheduler to schedule the non-blocking services within the storage I/O stack, as well as allocate a remaining number of logical processors for use by blocking services, e.g., scheduled by an operating system kernel scheduler.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: December 25, 2018
    Assignee: NetApp, Inc.
    Inventors: Jeffrey S. Kimmel, Christopher Joseph Corsi, Venkatesh Babu Chitlur Srinivasa
  • Publication number: 20180203721
    Abstract: A method and apparatus are provided in which a source and target perform bidirectional forwarding of traffic while a migration guest is being transferred from the source to the target. In some examples, the migration guest is exposed to the impending migration and takes an action in response. A virtual network programming controller informs other devices in the network of the change, such that those devices may communicate directly with the migration guest on the target host. According to some examples, an “other” virtual network device in communication with the controller and the target host facilitates the seamless migration. In such examples, the forwarding may be performed only until the other virtual machine receives an incoming packet from the target host, and then the other virtual machine resumes communication with the migration guest on the target host.
    Type: Application
    Filed: March 16, 2018
    Publication date: July 19, 2018
    Inventors: Brian Matthew Fahs, Jinnah Dylan Hosein, Venkatesh Babu Chitlur Srinivasa, Guy Shefner, Roy Donald Bryant, Uday Ramakrishna Naik, Francis Edward Swiderski, III, Nan Hua
  • Patent number: 10013276
    Abstract: A method and apparatus are provided in which a source and target perform bidirectional forwarding of traffic while a migration guest is being transferred from the source to the target. In some examples, the migration guest is exposed to the impending migration and takes an action in response. A virtual network programming controller informs other devices in the network of the change, such that those devices may communicate directly with the migration guest on the target host. According to some examples, an “other” virtual network device in communication with the controller and the target host facilitates the seamless migration. In such examples, the forwarding may be performed only until the other virtual machine receives an incoming packet from the target host, and then the other virtual machine resumes communication with the migration guest on the target host.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: July 3, 2018
    Assignee: Google LLC
    Inventors: Brian Matthew Fahs, Jinnah Dylan Hosein, Venkatesh Babu Chitlur Srinivasa, Guy Shefner, Roy Donald Bryant, Uday Ramakrishna Naik, Francis E. Swiderski, Nan Hua
  • Publication number: 20180067784
    Abstract: A cache affinity and processor utilization technique efficiently load balances work in a storage input/output (I/O) stack among a plurality of processors and associated processor cores of a node. The storage I/O stack employs one or more non-blocking messaging kernel (MK) threads that execute non-blocking message handlers (i.e., non-blocking services). The technique load balances work between the processor cores sharing a last level cache (LLC) (i.e., intra-LLC processor load balancing), and load balances work between the processors having separate LLCs (i.e., inter-LLC processor load balancing). The technique may allocate a predetermined number of logical processors for use by an MK scheduler to schedule the non-blocking services within the storage I/O stack, as well as allocate a remaining number of logical processors for use by blocking services, e.g., scheduled by an operating system kernel scheduler.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Jeffrey S. Kimmel, Christopher Joseph Corsi, Venkatesh Babu Chitlur Srinivasa
  • Patent number: 9842008
    Abstract: A cache affinity and processor utilization technique efficiently load balances work in a storage input/output (I/O) stack among a plurality of processors and associated processor cores of a node. The storage I/O stack employs one or more non-blocking messaging kernel (MK) threads that execute non-blocking message handlers (i.e., non-blocking services). The technique load balances work between the processor cores sharing a last level cache (LLC) (i.e., intra-LLC processor load balancing), and load balances work between the processors having separate LLCs (i.e., inter-LLC processor load balancing). The technique may allocate a predetermined number of logical processors for use by an MK scheduler to schedule the non-blocking services within the storage I/O stack, as well as allocate a remaining number of logical processors for use by blocking services, e.g., scheduled by an operating system kernel scheduler.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: December 12, 2017
    Assignee: NetApp, Inc.
    Inventors: Jeffrey S. Kimmel, Christopher Joseph Corsi, Venkatesh Babu Chitlur Srinivasa
  • Publication number: 20160246655
    Abstract: A cache affinity and processor utilization technique efficiently load balances work in a storage input/output (I/O) stack among a plurality of processors and associated processor cores of a node. The storage I/O stack employs one or more non-blocking messaging kernel (MK) threads that execute non-blocking message handlers (i.e., non-blocking services). The technique load balances work between the processor cores sharing a last level cache (LLC) (i.e., intra-LLC processor load balancing), and load balances work between the processors having separate LLCs (i.e., inter-LLC processor load balancing). The technique may allocate a predetermined number of logical processors for use by an MK scheduler to schedule the non-blocking services within the storage I/O stack, as well as allocate a remaining number of logical processors for use by blocking services, e.g., scheduled by an operating system kernel scheduler.
    Type: Application
    Filed: February 24, 2016
    Publication date: August 25, 2016
    Inventors: Jeffrey S. Kimmel, Christopher Joseph Corsi, Venkatesh Babu Chitlur Srinivasa
  • Publication number: 20150370596
    Abstract: A method and apparatus are provided in which a source and target perform bidirectional forwarding of traffic while a migration guest is being transferred from the source to the target. In some examples, the migration guest is exposed to the impending migration and takes an action in response. A virtual network programming controller informs other devices in the network of the change, such that those devices may communicate directly with the migration guest on the target host. According to some examples, an “other” virtual network device in communication with the controller and the target host facilitates the seamless migration. In such examples, the forwarding may be performed only until the other virtual machine receives an incoming packet from the target host, and then the other virtual machine resumes communication with the migration guest on the target host.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Brian Matthew Fahs, Jinnah Dylan Hosein, Venkatesh Babu Chitlur Srinivasa, Guy Shefner, Roy Donald Bryant, Uday Ramakrishna Naik, Francis E. Swiderski, III, Nan Hua
  • Publication number: 20110010427
    Abstract: Methods and apparatus facilitate the management of input/output (I/O) subsystems in virtual I/O servers to provide appropriate quality of services (QoS). A hierarchical QoS scheme based on partitioning of network interfaces and I/O subsystems transaction types are used to classify Virtual I/O communications. This multi-tier QoS method allows virtual I/O servers to be scalable and provide appropriate QoS granularity.
    Type: Application
    Filed: April 30, 2010
    Publication date: January 13, 2011
    Applicant: 3 Leaf Networks
    Inventors: Rohit Jnagal, Venkatesh Babu Chitlur Srinivasa
  • Patent number: 7782869
    Abstract: Processes for the control of traffic and Quality of Service (QoS) over a switch fabric network comprised of application servers and virtual I/O servers. In the embodiment, an application server includes virtual device interfaces, a QoS module, and a network port controlled by a packet scheduler. When the QoS module receives a packet from a virtual device interface, the QoS module stores the packet in a queue. The QoS module removes the packet from the queue and transmits it to the packet scheduler, in accordance with a hierarchical token bucket that allocates bandwidth for the port among the virtual device interfaces in the application server. In the embodiment, the port is the root of the hierarchy for the hierarchical token bucket and the virtual device interfaces are the leaves. The packet scheduler uses round-round arbitration to transmit the packet it receives to the port.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: August 24, 2010
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Venkatesh Babu Chitlur Srinivasa
  • Patent number: 7711789
    Abstract: Methods and apparatus facilitate the management of input/output (I/O) subsystems in virtual I/O servers to provide appropriate quality of services (QoS). A hierarchical QoS scheme based on partitioning of network interfaces and I/O subsystems transaction types are used to classify Virtual I/O communications. This multi-tier QoS method allows virtual I/O servers to be scalable and provide appropriate QoS granularity.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: May 4, 2010
    Assignee: 3 Leaf Systems, Inc.
    Inventors: Rohit Jnagal, Venkatesh Babu Chitlur Srinivasa
  • Patent number: RE44818
    Abstract: Methods and apparatus facilitate the management of input/output (I/O) subsystems in virtual I/O servers to provide appropriate quality of services (QoS). A hierarchical QoS scheme based on partitioning of network interfaces and I/O subsystems transaction types are used to classify Virtual I/O communications. This multi-tier QoS method allows virtual I/O servers to be scalable and provide appropriate QoS granularity.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: March 25, 2014
    Assignee: Intellectual Ventures Holding 80 LLC
    Inventors: Rohit Jnagal, Venkatesh Babu Chitlur Srinivasa