Abstract: A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer.

Abstract: A packaging scheme for MEMS device is provided. A method of packaging MEMS device in a semiconductor structure includes forming an insulation fence that surrounds the MEMS device on the semiconductor structure. The method further includes attaching a wafer of dielectric material to the insulation fence. The lid wafer, the insulation fence, and the semiconductor structure enclose the MEMS device.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: A packaging scheme for MEMS device is provided. A method of packaging MEMS device in a semiconductor structure includes forming an insulation fence that surrounds the MEMS device on the semiconductor structure. The method further includes attaching a wafer of dielectric material to the insulation fence. The lid wafer, the insulation fence, and the semiconductor structure enclose the MEMS device.

Abstract: A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer.

Abstract: A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer.

Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A silicon nitride capping layer is applied over the polysilicon protection layer. A polsilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.

Abstract: A packaging scheme for MEMS device is provided. A method of packaging MEMS device in a semiconductor structure includes forming an insulation fence that surrounds the MEMS device on the semiconductor structure. The method further includes attaching a wafer of dielectric material to the insulation fence. The lid wafer, the insulation fence, and the semiconductor structure enclose the MEMS device.

Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.

Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A polysilicon nitride capping layer is applied over the polysilicon protection layer. A polysilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.

Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A silicon nitride capping layer is applied over the polysilicon protection layer. A polsilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.