Patents by Inventor Venkatesh Sainath

Venkatesh Sainath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140156608
    Abstract: A system includes a processor executing code to compress a first page of data stored in memory and calculate an effectiveness of the compression on the first page. The processor further, in response to the calculated compression effectiveness being at least equal to a pre-determined/pre-established compression effectiveness threshold: identifies a plurality of second pages of data from memory that have similarities in content with the first page; and sequentially performs subsequent compressions of second pages from among the plurality of second pages in an order that is based on a relative ranking of the plurality of second pages. The ranking of the second pages is according to a calculated differential parameter associated with each of the second pages, which indicates a level of similarity that exists between the first page and a corresponding second page. Higher ranked second pages are compressed ahead of lower rank second pages, yielding greater compression efficiency.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: VENKATESH SAINATH
  • Publication number: 20140122930
    Abstract: Diagnostic tests are performed in a data center that includes servers of various types and a management console, where each server provides an error log in a format specific to the type of the server. The management console receives an error log indicating an error produced by a hardware component, parses the error log into an error notification that describes the error and a type of the hardware component, and provides the error notification to other servers. Each of the other servers determines whether the server includes a hardware component of the same type, and if so, performs one or more diagnostic tests on the hardware component and reports results of the diagnostic tests to the management console.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 1, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: SANTOSH DEVALE, RAJAT Y. JOSHI, VISHAL KULKARNI, VENKATESH SAINATH
  • Publication number: 20140122931
    Abstract: Diagnostic tests are performed in a data center that includes servers of various types and a management console, where each server provides an error log in a format specific to the type of the server. The management console receives an error log indicating an error produced by a hardware component, parses the error log into an error notification that describes the error and a type of the hardware component, and provides the error notification to other servers. Each of the other servers determines whether the server includes a hardware component of the same type, and if so, performs one or more diagnostic tests on the hardware component and reports results of the diagnostic tests to the management console.
    Type: Application
    Filed: August 13, 2013
    Publication date: May 1, 2014
    Applicant: International Business Machines Corporation
    Inventors: SANTOSH DEVALE, RAJAT Y. JOSHI, VISHAL KULKARNI, VENKATESH SAINATH
  • Publication number: 20140115226
    Abstract: A processor unit removes, responsive to obtaining a new address, an entry from a memory of a type of memory based on a comparison of a performance of the type of memory to different performances, each of the different performances associated with a number of other types of memory.
    Type: Application
    Filed: February 11, 2013
    Publication date: April 24, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rahul Chandrakar, Venkatesh Sainath, Vaidyanathan Srinivasan
  • Publication number: 20140115225
    Abstract: A processor unit removes, responsive to obtaining a new address, an entry from a memory of a type of memory based on a comparison of a performance of the type of memory to different performances, each of the different performances associated with a number of other types of memory.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rahul Chandrakar, Venkatesh Sainath, Vaidyanathan Srinivasan
  • Patent number: 8402259
    Abstract: A method for accelerating a wake-up time of a system is disclosed. The method includes scrubbing and making available for allocation a minimum amount of memory, executing a boot-up operation of an operating system stored on the system, and scrubbing and making available for allocation an additional amount of memory in parallel with and subsequent to the boot-up operation of the operating system. The system may include one or more nodes, each of the nodes having a minimum node resource configuration associated therewith that corresponds to a minimum number of processors included in a node that are required to be activated in order to activate the node. The system may further include one or more partitions, where each partition encompasses at least one node. Each partition may be assigned a priority in relation to other partitions, and the partitions may be successively activated based on the assigned priorities.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 19, 2013
    Assignee: International Business Machines Corporation
    Inventor: Venkatesh Sainath
  • Publication number: 20110131399
    Abstract: A method for accelerating a wake-up time of a system is disclosed. The method includes scrubbing and making available for allocation a minimum amount of memory, executing a boot-up operation of an operating system stored on the system, and scrubbing and making available for allocation an additional amount of memory in parallel with and subsequent to the boot-up operation of the operating system. The system may include one or more nodes, each of the nodes having a minimum node resource configuration associated therewith that corresponds to a minimum number of processors included in a node that are required to be activated in order to activate the node. The system may further include one or more partitions, where each partition encompasses at least one node. Each partition may be assigned a priority in relation to other partitions, and the partitions may be successively activated based on the assigned priorities.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 2, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Venkatesh Sainath
  • Publication number: 20060178210
    Abstract: There is described a game playing device (10) for receiving input data by scanning graphical information (160). The device (10) comprises a scanning arrangement (50) for transducing said input data from said graphical information (160). Moreover, the scanning arrangement further comprises computing hardware (30) coupled to the scanning arrangement (50) for receiving therefrom said input data comprising one or more of input parameters, software and solution parameters for controlling software execution within the computing hardware (30). Furthermore, there is also included a display arrangement (40) coupled to the computing hardware (30) for presenting graphical output information from the computing hardware (30) to one or more users of the device (10).
    Type: Application
    Filed: July 16, 2004
    Publication date: August 10, 2006
    Inventors: Venkatesh Sainath, Krishnan Vanradarajan