Abstract: An artificial intelligence processor can optimize the usage of its neural network to process a data set more efficiently. The artificial intelligence processor can have a neural network of multiple arithmetic logic units each having one or more computing engines and a local arithmetic memory divided into a set of clusters arranged into a node ring. A scheduler with a local scheduler memory for each cluster. An advanced extensible interface can read a data set model from an external memory in a single data read. A memory manager can control the node ring. When a data size of the data set is larger than a processing model layer for processing the data set, the memory manager can slice the data set into data set chunks. The memory manager can assign a data set chunk to a data cluster. The memory manager can broadcast channel instructions from the processing model layer to every cluster.

Abstract: An integrated circuit with a neural network can reduce the number of accesses off circuit by embedding a dedicated processor for each cluster in a neural network. The integrated circuit has a neural network of multiple arithmetic logic units arranged in clusters. Each arithmetic logic unit have one or more computing engines and a local arithmetic memory. The integrated circuit can associate a scheduler with each cluster. The integrated circuit can associate a cluster local memory with each cluster. The integrated circuit can associate a dedicated embedded processor with each cluster. The dedicated embedded processor is capable of performing general purpose operations. The integrated circuit can execute a non-computational operation offloaded from the cluster.