Patents by Inventor Venky Ramachandran

Venky Ramachandran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit design system, method, and computer program product that takes into account the stability of various design signals
    Patent number: 7966593
    Abstract: An integrated circuit design system, method, and computer program product are provided that takes into account signal stability. In use, at least one condition is identified where an output of a logic element before receipt of a clock signal is the same as the output of the logic element after receipt of the clock signal. To this end, such logic element may be disabled based on the identified condition for power savings or other purposes.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: June 21, 2011
    Assignee: Calypto Design Systems, Inc.
    Inventors: Venky Ramachandran, Nikhil Tripathi, Anmol Mathur, Sumit Roy, Malay Haldar
  • Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditions
    Patent number: 7761827
    Abstract: An integrated circuit design system, method, and computer program product are provided that takes into account observability based clock gating conditions. In use, at least one condition is identified where an output of a first logic element is not a function of a first input of the first logic element, due to a second input of the first logic element. To this end, at least one second logic element may be disabled based on the identified condition for power savings or other purposes.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: July 20, 2010
    Assignee: Calypto Design Systems, Inc.
    Inventors: Venky Ramachandran, Nikhil Tripathi, Anmol Mathur, Sumit Roy, Malay Haldar
  • System, method and computer program product for word-level operator-to-cell mapping
    Patent number: 7673257
    Abstract: A mapping system, method and computer program product are provided. In use, at least one arithmetic operator is received. Further, the at least one arithmetic operator is mapped to at least one cell, at a word-level.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: March 2, 2010
    Assignee: Calypto Design Systems, Inc.
    Inventors: Shail Bains, Abhishek Ranjan, Anmol Mathur, Venky Ramachandran
  • System, method and computer program product for word-level computations and storage
    Patent number: 7333032
    Abstract: A system, method and computer program product are provided for generating and manipulating a compressed data structure. Initially, a plurality of values associated with an ordered collection of bits is received. It is then determined which of the values are the same. To this end, a compressed data structure including the values is generated, based on the determination.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: February 19, 2008
    Assignee: Calypto Design Systems, Inc.
    Inventors: Venky Ramachandran, Malay Haldar
  • Symbolic constraint-based system for preroute reconstruction following floorplan incrementing
    Patent number: 6002857
    Abstract: The present invention includes a method for automatically reconstructing most of the power, ground and clock prerouting without significant user involvement. This enables several floorplans to be tried concurrently in a batch mode. The method automatically migrates many floorplans in increments to find the best result for each starting floorplan. The user is then free to select a floorplan that looks best from the candidates generated with all the special net routing patterns already considered and updated for each.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: December 14, 1999
    Assignee: Avant! Corporation
    Inventor: Venkateswaran ("Venky") Ramachandran