Patents by Inventor Venmathy McMahan

Venmathy McMahan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10475715
    Abstract: Some embodiments relate to an electronic package. The electronic package includes a first die and a second die stacked onto the first die. A first encapsulant is positioned between the first die and the second die. The first encapsulant includes a first material that covers a first volume between the first die and the second die. A second encapsulant is positioned between the first die and the second die. The second encapsulant includes a second material that covers a second volume between the first die and the second die. The first material has a higher thermal conductivity than the second material, and the second material more effectively promotes electrical connections between the first die and the second die as compared to the first material.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: November 12, 2019
    Assignee: Intel Corporation
    Inventors: Venmathy McMahan, Sivakumar Nagarajan, Elah Bozorg-Grayeli, Amrita Mallik, Kuang-Han Chu, Liwei Wang, Nisha Ananthakrishnan, Craig J. Weinman, Amram Eitan
  • Publication number: 20180286704
    Abstract: A process for applying an underfill material to a die is disclosed. A wafer is diced into a plurality of dies (without having any underfill film thereon) such that the dies have exposed bumps prior to an underfill process. Thus, the dies can be tested about their bump-sides because the bumps are entirely exposed for testing. The dies are then reconstituted bump-side up on a carrier panel in an array such that the dies are separated from each other by a gap. Underfill material (e.g., epoxy flux film) is then vacuum laminated to the carrier panel and the plurality of dies to encapsulate the dies. The underfill material is then cut between adjacent dies such that a portion of the underfill material covers at least one side edge of each die. The encapsulated dies are then removed from the carrier panel, thereby being prepared for a thermal bonding process to a substrate. Associated devices are provided.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Elizabeth M. Nofen, Arjun Krishnan, James C. Matayabas, JR., Venmathy McMahan, Nisha Ananthakrishnan, Yonghao Xiu
  • Patent number: 9991211
    Abstract: Semiconductor packages and methods of forming semiconductor packages are described. In an example, a semiconductor package includes a shielding layer containing metal particles, e.g., conductive particles or magnetic particles, in a resin matrix to attenuate electromagnetic interference. In an example, the shielding layer is transferred from a molding chase to the semiconductor package during a polymer molding operation.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: June 5, 2018
    Assignee: Intel Corporation
    Inventors: Anna M. Prakash, Reynaldo Alberto Olmedo, Venmathy McMahan, Rajendra C. Dias, Joshua David Heppner, Ann Jinyan Xu, Sriya Sanyal, Eric Jin Li
  • Publication number: 20170287851
    Abstract: Semiconductor packages and methods of forming semiconductor packages are described. In an example, a semiconductor package includes a shielding layer containing metal particles, e.g., conductive particles or magnetic particles, in a resin matrix to attenuate electromagnetic interference. In an example, the shielding layer is transferred from a molding chase to the semiconductor package during a polymer molding operation.
    Type: Application
    Filed: May 26, 2017
    Publication date: October 5, 2017
    Inventors: Anna M. Prakash, Reynaldo Alberto Olmedo, Venmathy McMahan, Rajendra C. Dias, Joshua David Heppner, Ann Jinyan Xu, Sriya Sanyal, Eric Jin Li
  • Patent number: 9685413
    Abstract: Semiconductor packages and methods of forming semiconductor packages are described. In an example, a semiconductor package includes a shielding layer containing metal particles, e.g., conductive particles or magnetic particles, in a resin matrix to attenuate electromagnetic interference. In an example, the shielding layer is transferred from a molding chase to the semiconductor package during a polymer molding operation.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 20, 2017
    Assignee: Intel Corporation
    Inventors: Anna M. Prakash, Reynaldo Alberto Olmedo, Venmathy McMahan, Rajendra C. Dias, Joshua David Heppner, Ann Jinyan Xu, Sriya Sanyal, Eric Jin Li
  • Publication number: 20170170088
    Abstract: Some embodiments relate to an electronic package. The electronic package includes a first die and a second die stacked onto the first die. A first encapsulant is positioned between the first die and the second die. The first encapsulant includes a first material that covers a first volume between the first die and the second die. A second encapsulant is positioned between the first die and the second die. The second encapsulant includes a second material that covers a second volume between the first die and the second die. The first material has a higher thermal conductivity than the second material, and the second material more effectively promotes electrical connections between the first die and the second die as compared to the first material.
    Type: Application
    Filed: June 17, 2015
    Publication date: June 15, 2017
    Inventors: Venmathy McMahan, Sivakumar Nagarajan, Elah Bozorg-Grayeli, Amrita Mallik, Kuang-Han Chu, Liwei Wang, Nisha Ananthakrishnan, Craig J. Weinman, Amram Eitan