Patents by Inventor Venu G. Nayar

Venu G. Nayar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimized flash based cache memory
    Patent number: 8656088
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: February 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Eyal Lotem, Venu G. Nayar, Assaf Nitzan, Edi Shmueli, Daniel F. Smith
  • Optimized flash based cache memory
    Patent number: 8645619
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Eyal Lotern, Venu G. Nayar, Assaf Nitzan, Edi Shmueli, Daniel F. Smith
  • Storage system cache using flash memory with direct block access
    Patent number: 8583868
    Abstract: Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: November 12, 2013
    Assignee: International Business Machines
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Venu G. Nayar, Daniel F. Smith, Krishnakumar Rao Surugucchi
  • STORAGE SYSTEM CACHE USING FLASH MEMORY WITH DIRECT BLOCK ACCESS
    Publication number: 20130054873
    Abstract: Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Venu G. Nayar, Daniel F. Smith, Krishnakumar Rao Surugucchi
  • OPTIMIZED FLASH BASED CACHE MEMORY
    Publication number: 20120297127
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith
  • OPTIMIZED FLASH BASED CACHE MEMORY
    Publication number: 20120297113
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith