Patents by Inventor Vernon Coles

Vernon Coles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090120843
    Abstract: A filtration apparatus is disclosed for the removal of metals from jet fuel at high flow rates and limited pressure drops. The filter comprises a monolayer of immobilized chelating agent on packed silica gel. The filtration apparatus is particularly useful for the removal of copper from jet fuel.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 14, 2009
    Applicant: CFD Research Corporation
    Inventors: Ashok Gidwani, Debasis Sengupta, Vernon Cole, Stelu Deaconu, Jianjun Wei
  • Publication number: 20050082407
    Abstract: Methods and systems are provided for receiving and streaming storage tape by a tape head from storage tape cartridges of varying formats in a single tape drive. In one example, an exemplary tape drive system includes a receiver, a reel driver system configured to selectively drive at least two cartridges having different cartridge formats, and a drive leader system configured to selectively couple with at least two different cartridge leader formats associated with the at least two different cartridge formats.
    Type: Application
    Filed: March 5, 2004
    Publication date: April 21, 2005
    Inventors: George Saliba, Vernon Coles
  • Patent number: 6528377
    Abstract: A silicon-on-insulator substrate and its method of formation are disclosed. In another embodiment, a method for forming a high-k gate dielectric is disclosed. The silicon-on-insulator substrate is prepared by forming a lattice matched dielectric layer (20) over a semiconductor substrate (10). A thermodynamically stable dielectric layer (22) is then formed over the lattice matched dielectric layer (20). A semiconductor layer (30) is then formed over the thermodynamically stable dielectric layer (22). Formation of the high-k gate dielectric includes the processing steps used to form the silicon-on-insulator substrate and additionally includes bonding a second semiconductor substrate (50) to the semiconductor layer (30). The first semiconductor substrate (10) is then removed to expose the lattice matched dielectric layer (20). This results in a silicon substrate that has a layer of high-k dielectric material that can be used as the gate dielectric for integrated circuits formed on the substrate.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: March 4, 2003
    Assignee: Motorola, Inc.
    Inventors: Theodoros Mihopoulos, Prasad V. Alluri, J. Vernon Cole