Abstract: An apparatus includes plural spaced apart sensors arranged along a direction of motion of a medium, and a processing circuit to receive signals from the sensors, determine a difference of the signals, and identify an error built into the medium based on the difference.

Abstract: To access data on a storage medium, at least three servo stripes simultaneously recorded in a servo track are read. The at least three servo stripes have different orientations on the servo track. An indication of a lateral position of a storage medium access head with respect to the servo track is generated based on reading the at least three servo stripes.

Abstract: In one embodiment, a servo positioning method includes deriving a first servo signal S1 from a first servo band, deriving a second servo signal S2 from a second servo band, defining a head element reference between the servo bands, weighting each servo signal according to a ratio of distances between the head element reference and a location on each servo band, and computing a servo control signal based on the weighted servo signals.

Abstract: In one embodiment, an arrangement of elements on a head includes a first group of data element spanning a first distance on the head and a second group of data elements spanning a second spanning distance on the head greater than the first spanning distance. The second group of overlaps the first group of elements such that some elements are common to both groups.

Abstract: Electromagnetic tape head position is adjusted according to vibration indicative information received from vibration sensor secured to tape transport mechanism that supports the tape head.

Abstract: A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The reset output signal is coupled in a feedback configuration so as to lower the threshold voltage when the reset output switches to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit.

Abstract: A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The delay capacitor is coupled in a feedback configuration so as to lower the threshold voltage when the delay capacitor voltage indicates to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit.