Patents by Inventor Vernon Solberg
Vernon Solberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060286717Abstract: A method of making a stacked microelectronic assembly includes providing a flexible substrate having first and second ends, the flexible substrate having a plurality of attachment sites located between the first and second ends thereof including a first one of the attachment sites located adjacent the first end of the flexible substrate, the flexible substrate including conductive terminals accessible at a surface of the flexible substrate and wiring connected to the terminals, providing a compliant layer over the first attachment site, assembling a plurality of microelectronic elements over the attachment sites, wherein a first one of the microelectronic elements engages the compliant layer and is movable relative to the flexible substrate, electrically interconnecting the microelectronic elements and the wiring, folding the flexible substrate and stacking at least some of the microelectronic elements in generally vertical alignment with one another so that the first one of the microelectronic elements engagType: ApplicationFiled: May 6, 2005Publication date: December 21, 2006Applicant: Tessera, Inc.Inventors: Vernon Solberg, Pieter Bellaar, Young-Gon Kim, Belgacem Haba
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Patent number: 7149095Abstract: A stacked microelectronic assembly includes a plurality of microelectronic subassemblies. Each subassembly includes a substrate having at least one site, a plurality of first contacts and a plurality of second contacts. Each subassembly also has at least one microelectronic element assembled to the at least one attachment site and electrically connected to at least some of the first and second contacts. The substrate is folded so that the first contacts are accessible at a bottom of a subassembly and the second contacts are accessible at a top of a subassembly. The plurality of subassemblies are stacked one on top of another in a generally vertical configuration. The substrate of at least one of the subassemblies has a plurality of attachment sites and a plurality of microelectronic elements assembled to the attachment sites. The substrate is folded so that at least some of the plurality of microelectronic elements are disposed alongside one another.Type: GrantFiled: October 28, 2002Date of Patent: December 12, 2006Assignee: Tessera, Inc.Inventors: Michael Warner, Philip Damberg, John B. Riley, David Gibson, Young-Gon Kim, Belgacem Haba, Vernon Solberg
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Patent number: 6699730Abstract: A method of making a stacked microelectronic assembly includes providing a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack.Type: GrantFiled: February 2, 2001Date of Patent: March 2, 2004Assignee: Tessers, Inc.Inventors: Young Kim, Belgacem Haba, Vernon Solberg
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Publication number: 20030168725Abstract: A stacked microelectronic assembly comprises a plurality of subassemblies including folded substrates and at least one microelectronic element. The subassemblies are stacked substantially vertically.Type: ApplicationFiled: October 28, 2002Publication date: September 11, 2003Applicant: Tessera, Inc.Inventors: Michael Warner, Philip Damberg, John B. Riley, David Gibson, Young-Gon Kim, Belgacem Haba, Vernon Solberg
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Patent number: 6313528Abstract: A multichip package includes a substrate including a plurality of conductive traces and flexible leads connected to outer ends of at least some of the conductive traces adjacent the periphery of said flexible substrate, the substrate including conductive terminals accessible at a surface thereof connected to at least some of the traces. The package includes a first microelectronic element having a front face including contacts and a back face, the front face of the first microelectronic element confronting the flexible substrate. The package also includes a second microelectronic element larger than the first microelectronic element, the second microelectronic element having a front face including contacts, the second microelectronic element overlying the first microelectronic element with the front face of the second microelectronic element facing toward the substrate.Type: GrantFiled: August 4, 2000Date of Patent: November 6, 2001Assignee: Tessera, Inc.Inventor: Vernon Solberg
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Publication number: 20010006252Abstract: A method of making a stacked microelectronic assembly includes providing a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack.Type: ApplicationFiled: February 2, 2001Publication date: July 5, 2001Inventors: Young Kim, Belgacem Haba, Vernon Solberg
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Patent number: 6225688Abstract: A stacked microelectronic assembly and its resulting structure includes a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The assembly includes a plurality of microelectronic elements assembled to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack. The assembly may be made using a dam and or a spacer to facilitate the folding process.Type: GrantFiled: February 4, 1999Date of Patent: May 1, 2001Assignee: Tessera, Inc.Inventors: Young Kim, Belgacem Haba, Vernon Solberg
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Patent number: 6147401Abstract: A multichip package includes a substrate including a plurality of conductive traces and flexible leads connected to outer ends of at least some of the conductive traces adjacent the periphery of said flexible substrate, the substrate including conductive terminals accessible at a surface thereof connected to at least some of the traces. The package includes a first microelectronic element having a front face including contacts and a back face, the front face of the first microelectronic element confronting the flexible substrate. The package also includes a second microelectronic element larger than the first microelectronic element, the second microelectronic element having a front face including contacts, the second microelectronic element overlying the first microelectronic element with the front face of the second microelectronic element facing toward the substrate. A compliant element is disposed alongside the first microelectronic element between the second microelectronic element and the substrate.Type: GrantFiled: February 8, 2000Date of Patent: November 14, 2000Assignee: Tessera, Inc.Inventor: Vernon Solberg
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Patent number: 6121676Abstract: A method of making a stacked microelectronic assembly such as a semiconductor chip assembly and its resulting structure includes providing a flexible substrate having a plurality of attachment sites and conductive terminals and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads so that the electrically connected microelectronic elements are movable relative to the flexible substrate. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack. The stacked assembly is held in place using a thermally conductive adhesive and/or a mechanical element.Type: GrantFiled: December 11, 1997Date of Patent: September 19, 2000Assignee: Tessera, Inc.Inventor: Vernon Solberg
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Patent number: 6054337Abstract: A method of making a multichip package includes providing a flexible substrate having a plurality of conductive traces and flexible leads connected to outer ends of the conductive traces adjacent the periphery of said flexible substrate. The flexible substrate includes conductive terminals accessible at a surface thereof connected to at least some of the conductive traces.Type: GrantFiled: December 12, 1997Date of Patent: April 25, 2000Assignee: Tessera, Inc.Inventor: Vernon Solberg
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Patent number: 5885849Abstract: A method of making a microelectronic assembly includes providing a starting subassembly having a microelectronic component with a top surface and having electrical contacts, the subassembly further including a plurality of terminals over the top surface of the component, each terminal being connected to at least one contact of the component but moveable with respect to the component; positioning a plurality of joining units each having a solid core on the terminal; providing a unit bonding material at interfaces between each core terminal; and bonding the joining units to the terminals by heating the joining units and terminals so as to convert the unit bonding material to a liquid phase without melting the cores and solidifying the unit bonding material.Type: GrantFiled: February 6, 1998Date of Patent: March 23, 1999Assignee: Tessera, Inc.Inventors: Thomas H. DiStefano, Vernon Solberg
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Patent number: 5801446Abstract: A microelectronic component such as a semiconductor chip having electrical contacts is provided with terminals, the terminals being movable relative to the component. A joining unit having a solid core is disposed on each terminal and extends upwardly, away from the component. Each unit includes a bonding material such as a solder bonding the terminal and the solid core, the bonding material desirably defining a waist or narrow section spaced above the terminal, the waist having a curved surface forming a stress-relieving fillet. The joining units are bonded to contact pads of a substrate such as a circuit panel as by bonding the solder of the joining units to the terminals, or by means of a further solder on the contact pads having a lower melting point. The assembly provides substantial resistance to mechanical stress caused by thermal expansion. Preferably, the terminals are movable in vertical directions towards the component to compensate for nonplanarity during assembly.Type: GrantFiled: March 28, 1995Date of Patent: September 1, 1998Assignee: Tessera, Inc.Inventors: Thomas H. DiStefano, Vernon Solberg