Patents by Inventor Vesa Lahtinen

Vesa Lahtinen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • 3D chip arrangement including memory manager
    Patent number: 7894229
    Abstract: Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: February 22, 2011
    Assignee: Nokia Corporation
    Inventors: Vesa Lahtinen, Tapio Hill, Kimmo Kuusilinna, Jari Nikara, Mika Kuulusa, Tommi Makelainen
  • 3D CHIP ARRANGEMENT INCLUDING MEMORY MANAGER
    Publication number: 20090147557
    Abstract: Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 11, 2009
    Inventors: VESA LAHTINEN, TAPIO HILL, KIMMO KUUSILINNA, JARI NIKARA, MIKA KUULUSA, TOMMI MAKELAINEN
  • Methods and system for modular device booting
    Publication number: 20090055639
    Abstract: The present invention a method for modular device booting comprising retrieving a first boot code from a non-volatile memory element, receiving a memory access request from at least one subsystem, said memory access including at least a boot status indication indicating a memory region and a memory address, if said received address and region match a predefined address and region, associating said at least one subsystem with a corresponding subsystem boot code address included in said retrieved first boot code, retrieving a corresponding subsystem boot code from said associated boot code address, and transferring said boot code to said corresponding subsystem.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Inventors: Kimmo Kuusilinna, Jari Nikara, Vesa Lahtinen, Antti Latva-Aho
  • 3D chip arrangement including memory manager
    Patent number: 7477535
    Abstract: Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: January 13, 2009
    Assignee: Nokia Corporation
    Inventors: Vesa Lahtinen, Tapio Hill, Kimmo Kuusilinna, Jari Nikara, Mika Kuulusa, Tommi Makelainen
  • 3D chip arrangement including memory manager
    Publication number: 20080084725
    Abstract: Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 10, 2008
    Inventors: Vesa Lahtinen, Tapio Hill, Kimmo Kuusilinna, Jari Nikara, Mika Kuulusa, Tommi Makelainen
  • Memory management method and system
    Publication number: 20080086603
    Abstract: Systems, apparatuses and methods for efficient logical memory management using centralized memory management. One embodiment involves allocating a first memory region to a first subsystem, generating a region code associated with the allocated memory region, storing the region code in connection with an address of the memory region, and defining the first subsystem as a first owner for the memory region by storing a unique subsystem identifier together with the region code in a parameter table. In this manner, a memory region may be globally addressed by its region code and an ownership to a subsystem is defined and stored.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 10, 2008
    Inventors: Vesa Lahtinen, Kimmo Kuusilinna, Jari Nikara, Jukka M. Nurminen