Abstract: A rectifier arrangement for a three-phase generator having at least one power diode allocated to each half-wave of each phase and a cooling arrangement for the power diodes. The power diodes may be designed as diode chips and be arranged between two diametrically opposed heat sinks, while being oriented with respect to polarity and electrically and/or thermally conductive.

Abstract: The rectifier arrangement, preferably for a three-phase generator for a motor vehicle, has at least one power diode of positive polarity and at least one power diode of negative polarity assigned to respective half waves of each phase of the three-phase current and a cooling arrangement for the power diodes, the power diodes of like polarity being arranged on respective heat sinks in an electrically and thermally conductive fashion, and the heat sinks being sandwiched together with at least one electrically insulating part (32) which contains the electrical conductors between the diodes and the three-phase winding.

Abstract: Semiconductor arrangements, in particular diodes, have a p-layer and two n-layers that are doped to varying degrees of thickness. The p-n junction between the p-layer and the heavily doped n-layer is arranged in the chip so as to allow it to lie completely inside the chip. The p-n junction between the p-layer and the n-layer is situated in the outside areas of the chip. This arrangement does not permit any high field strengths to occur on the outside of the chip and, at the same time, it makes it possible for easily reproducible properties to be achieved. The manufacturing method can also be carried-out outside of a clean room.

Abstract: A process for manufacturing semiconductor components, especially diodes. The process entails first bonding two semiconductor wafers of different conducting types (p and n), according to a silicon-fusion bonding process (SFB), thereby forming a bonded wafer assembly with a p-n junction. The bonded wafers are then partitioned into a plurality of semiconductor elements by the cutting of grooves into the bonded wafers to a depth which extends at least to the p-n junction. Each of the plurality of semiconductor elements thus formed has an individual p-n junction with sides exposed by the grooves. The sides of the semiconductor elements are then subjected to etching and passivation. The upper and lower surfaces of the bonded wafer assembly are then metal-coated. Finally, the semiconductor elements are separated from each other by a sawing operation.

Abstract: The invention relates to a method for soldering together a first, in particular electrical, component with a second, in particular electrical, component, where a solder preform is disposed between the components and is fixed by pressing it against edges of at least one depression in one of the components to prevent lateral dislocation and where subsequently the soldering process takes place, preferably in a soldering furnace. A special feature is that the depression is formed as grooves (10) extending in a closed loop (11), in particular in the shape of a circle.

Abstract: In making a power diode with high reverse voltage rating, corrosion of the silicon wafer surface by gettering substances is avoided by employing two different diffusion steps. In the first step, boron and phosphorus are respectively applied to opposing major surfaces of the disk-shaped semiconductor body (10) and driven into it by heating to a predetermined temperature. Gettering is employed to increase the charge carrier lifetime and thereby reduce the forward voltage drop of the diode. The gettering is carried out in a second diffusion step at a diffusion temperature sufficiently reduced with respect to the diffusion temperature of the first step to avoid significantly affecting the depth of diffusion of the doping substances into the semiconductor body.