Patents by Inventor Vi Vuong

Vi Vuong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7765076
    Abstract: In allocating processing units, first and second requests for jobs are obtained. First and second numbers of processing units requested are determined. First and second numbers of available processing units are determined. When the first number of available processing units is non-zero, the first number of available number of processing units or the first number of processing units requested is assigned to a first processing cluster. A first processing unit in the first processing cluster is designated as a master node. When the second number of available processing units is non-zero, the second number of available number of processing units or the second number of processing units requested is assigned to a second processing cluster. The first processing unit in the second processing cluster is designated as a slave node. The first and second jobs are assigned to the first and second processing clusters, respectively.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: July 27, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Hemalatha Erva, Hong Qiu, Junwei Bao, Vi Vuong
  • Patent number: 7742888
    Abstract: In allocating processing units of a computer system to generate simulated diffraction signals used in optical metrology, a request for a job to generate simulated diffraction signals using multiple processing units is obtained. A number of processing units requested for the job to generate simulated diffraction signals is then determined. A number of available processing units is determined. When the number of processing units requested is greater than the number of available processing units, a number of processing units is assigned to generate the simulated diffraction signals that is less than the number of processing units requested.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: June 22, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Hemalatha Erva, Hong Qiu, Junwei Bao, Vi Vuong
  • Patent number: 7616325
    Abstract: An optical metrology model for a structure to be formed on a wafer is developed by characterizing a top-view profile and a cross-sectional view profile of the structure using profile parameters. The profile parameters of the top-view profile and the cross-sectional view profile are integrated together into the optical metrology model. The profile parameters of the optical metrology model are saved.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: November 10, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Junwei Bao, Joerg Bischoff
  • Patent number: 7588949
    Abstract: The optimization of an optical metrology model for use in measuring a wafer structure is evaluated. An optical metrology model having metrology model variables, which includes profile model parameters of a profile model, is developed. One or more goals for metrology model optimization are selected. One or more profile model parameters to be used in evaluating the one or more selected goals are selected. One or more metrology model variables to be set to fixed values are selected. One or more selected metrology model variables are set to fixed values. One or more termination criteria for the one or more selected goals are set. The optical metrology model is optimized using the fixed values for the one or more selected metrology model variables. Measurements for the one or more selected profile model parameters are obtained using the optimized optical metrology model. A determination is then made as to whether the one or more termination criteria are met by the obtained measurements.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: September 15, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Emmanuel Drege, Shifang Li, Junwei Bao
  • Patent number: 7526354
    Abstract: A system for examining a patterned structure formed on a semiconductor wafer using an optical metrology model includes a first fabrication cluster, a metrology cluster, an optical metrology model optimizer, and a real time profile estimator. The first fabrication cluster configured to process a wafer, the wafer having a first patterned and a first unpatterned structure. The first patterned structure has underlying film thicknesses, critical dimension, and profile. The metrology cluster including one or more optical metrology devices coupled to the first fabrication cluster. The metrology cluster is configured to measure diffraction signals off the first patterned and the first unpatterned structure. The metrology model optimizer is configured to optimize an optical metrology model of the first patterned structure using one or more measured diffraction signals off the first patterned structure and with floating profile parameters, material refraction parameters, and metrology device parameters.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 28, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Manuel Madriaga, Junwei Bao, Vi Vuong
  • Patent number: 7525673
    Abstract: A system for examining a patterned structure formed on a semiconductor wafer using an optical metrology model includes a first fabrication cluster, a metrology cluster, an optical metrology model optimizer, and a real time profile estimator. The first fabrication cluster processes a wafer, the wafer having a first patterned and a first unpatterned structure. The metrology cluster measures diffraction signals off the first patterned and first unpatterned structure. The metrology model optimizer optimizes an optical metrology model of the first patterned structure. The real time profile estimator creates an output comprising underlying film thickness, critical dimension, and profile of the first patterned structure.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 28, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Junwei Bao
  • Patent number: 7522295
    Abstract: Structures formed on a semiconductor wafer are consecutively measured by obtaining first and second measured diffraction signals of a first structure and a second structure formed abutting the first structure. The first and second measured diffraction signals were consecutively measured using a polarized reflectometer. The first measured diffraction signal is compared to a first simulated diffraction signal generated using a profile model of the first structure. The profile model has profile parameters that characterize geometries of the first structure. One or more features of the first structure are determined based on the comparison. The second measured diffraction signal is converted to a converted diffraction signal. The converted diffraction signal is compared to the first simulated diffraction signal or a second simulated diffraction signal generated using the same profile model as the first simulated diffraction signal.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: April 21, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Junwei Bao, Manuel Madriaga
  • Patent number: 7523021
    Abstract: A weighting function is obtained to enhance measured diffraction signals used in optical metrology. To obtain the weighting function, a measured diffraction signal is obtained. The measured diffraction signal was measured from a site on a wafer using a photometric device. A first weighting function is defined based on noise that exists in the measured diffraction signal. A second weighting function is defined based on accuracy of the measured diffraction signal. A third weighting function is defined based on sensitivity of the measured diffraction signal. A fourth weighting function is defined based on one or more of the first, second, and third weighting functions.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 21, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Junwei Bao, Shifang Li, Yan Chen
  • Patent number: 7522294
    Abstract: To measure a process parameter of a semiconductor fabrication process, the fabrication process is performed on a first area using a first value of the process parameter. The fabrication process is performed on a second area using a second value of the process parameter. A first measurement of the first area is obtained using an optical metrology tool. A second measurement of the second area is obtained using the optical metrology tool. One or more optical properties of the first area are determined based on the first measurement. One or more optical properties of the second area are determined based on the second measurement. The fabrication process is performed on a third area. A third measurement of the third area is obtained using the optical metrology tool. A third value of the process parameter is determined based on the third measurement and a relationship between the determined optical properties of the first and second areas.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: April 21, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Hanyou Chu, Vi Vuong, Yan Chen
  • Publication number: 20090094001
    Abstract: Metrology data from a semiconductor treatment system is transformed using multivariate analysis. In particular, a set of metrology data measured or simulated for one or more substrates treated using the treatment system is obtained. One or more essential variables for the obtained set of metrology data is determined using multivariate analysis. A first metrology data measured or simulated for one or more substrates treated using the treatment system is obtained. The first obtained metrology data is not one of the metrology data in the set of metrology data earlier obtained. The first metrology data is transformed into a second metrology data using the one or more of the determined essential variables.
    Type: Application
    Filed: December 16, 2008
    Publication date: April 9, 2009
    Applicant: Timbre Technologies, Inc.
    Inventors: Vi VUONG, Junwei BAO, Yan CHEN, Weichert HEIKO, Sebastien EGRET
  • Patent number: 7515282
    Abstract: The profile of a structure having a region with a spatially varying property is modeled using an optical metrology model. A set of profile parameters is defined for the optical metrology model to characterize the profile of the structure. A set of layers is defined for a portion the optical metrology model that corresponds to the region of the structure with the spatially varying property, each layer having a defined height and width. For each layer, a mathematic function that varies across at least a portion of the width of the layer is defined to characterize the spatially varying property within a corresponding layer in the region of the structure.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: April 7, 2009
    Assignee: Timbre Technologies, Inc.
    Inventors: Shifang Li, Vi Vuong, Alan Nolet, Junwei Bao
  • Patent number: 7505153
    Abstract: A profile model for use in optical metrology of structures in a wafer is selected, the profile model having a set of geometric parameters associated with the dimensions of the structure. The set of geometric parameters is selected to a set of optimization parameters. The number of optimization parameters within the set of optimization parameters is less than the number of geometric parameters within the set of geometric parameters. A set of selected optimization parameters is selected from the set of optimization parameters. The parameters of the set of selected geometric parameters are used as parameters of the selected profile model. The selected profile model is tested against one or more termination criteria.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: March 17, 2009
    Assignee: Timbre Technologies, Inc.
    Inventors: Vi Vuong, Emmanuel Drege, Junwei Bao, Srinivas Doddi, Xinhui Niu, Nickhil Jakatdar
  • Patent number: 7505148
    Abstract: Optical metrology tools are matched by obtaining a first set of measured diffraction signals, which was measured using a first optical metrology tool, and a second set of measured diffraction signals, which was measured using a second optical metrology tool. A first spectra-shift offset is generated based on the difference between the first set of measured diffraction signals and the second set of measured diffraction signals. A first noise weighting function for the first optical metrology tool is generated based on measured diffraction signals measured using the first optical metrology tool. A first measured diffraction signal measured using the first optical metrology tool is obtained. A first adjusted diffraction signal is generated by adjusting the first measured diffraction signal using the first spectra-shift offset and the first noise weighting function.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: March 17, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Yan Chen, Holger Tuitje
  • Patent number: 7495781
    Abstract: An optical metrology model is created for a patterned structure formed on a semiconductor wafer. The optical metrology model has profile parameters, material refraction parameters, and metrology device parameters. Ranges of values for the parameters are defined. One or more measured diffraction signals of the patterned structure are obtained. The optical metrology model is optimized to obtain an optimized optical metrology model using the defined ranges of values defined and the one or more obtained measured diffraction signals of the patterned structure. For at least one parameter from amongst the material refraction parameters and the metrology device parameters, the at least one parameter is set to a fixed value within the range of values for the at least one parameter. At least one profile parameter of the patterned structure is determined using the optimized optical metrology model and the fixed value for the at least one parameter.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: February 24, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Junwei Bao
  • Patent number: 7474993
    Abstract: Specific wavelengths to use in optical metrology of an integrated circuit can be selected using one or more selection criteria and termination criteria. Wavelengths are selected using the selection criteria, and the selection of wavelengths is iterated until the termination criteria are met.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: January 6, 2009
    Assignee: Timbre Technologies, Inc.
    Inventors: Srinivas Doddi, Lawrence Lane, Vi Vuong, Michael Laughery, Junwei Bao, Kelly Barry, Nickhil Jakatdar, Emmanuel Drege
  • Patent number: 7474420
    Abstract: To determine one or more features of an in-die structure on a semiconductor wafer, a correlation is determined between one or more features of a test structure to be formed on a test pad and one or more features of a corresponding in-die structure. A measured diffraction signal measured off the test structure is obtained. One or more features of the test structure are determined using the measured diffraction signal. The one or more features of the in-die structure are determined based on the one or more determined features of the test structure and the determined correlation.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: January 6, 2009
    Assignee: Timbre Technologies, Inc.
    Inventors: Shifang Li, Junwei Bao, Vi Vuong
  • Patent number: 7467064
    Abstract: Metrology data from a semiconductor treatment system is transformed using multivariate analysis. In particular, a set of metrology data measured or simulated for one or more substrates treated using the treatment system is obtained. One or more essential variables for the obtained set of metrology data is determined using multivariate analysis. A first metrology data measured or simulated for one or more substrates treated using the treatment system is obtained. The first obtained metrology data is not one of the metrology data in the set of metrology data earlier obtained. The first metrology data is transformed into a second metrology data using the one or more of the determined essential variables.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: December 16, 2008
    Assignee: Timbre Technologies, Inc.
    Inventors: Vi Vuong, Junwei Bao, Yan Chen, Weichert Heiko, Sebastien Egret
  • Publication number: 20080285054
    Abstract: An optical metrology model for a structure to be formed on a wafer is developed by characterizing a top-view profile and a cross-sectional view profile of the structure using profile parameters. The profile parameters of the top-view profile and the cross-sectional view profile are integrated together into the optical metrology model. The profile parameters of the optical metrology model are saved.
    Type: Application
    Filed: June 17, 2008
    Publication date: November 20, 2008
    Applicant: Timbre Technologies, Inc.
    Inventors: Vi VUONG, Junwei BAO, Joerg BISCHOFF
  • Patent number: 7428044
    Abstract: Drift in an optical metrology tool is compensated for by obtaining a first measured diffraction signal and a second measured diffraction signal of a first calibration structure mounted on the optical metrology tool. The first and second measured diffraction signals were measured using the optical metrology tool. The second measured diffraction signal was measured later in time than the first measured diffraction signal. A first drift function is generated based on the difference between the first and second measured diffraction signals. A third measured diffraction signal is obtained of a first structure formed on a first wafer using the optical metrology tool. A first adjusted diffraction signal is generated by adjusting the third measured diffraction signal using the first drift function.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: September 23, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Vi Vuong, Yan Chen, Holger Tuitje
  • Publication number: 20080212080
    Abstract: To measure a process parameter of a semiconductor fabrication process, the fabrication process is performed on a first area using a first value of the process parameter. The fabrication process is performed on a second area using a second value of the process parameter. A first measurement of the first area is obtained using an optical metrology tool. A second measurement of the second area is obtained using the optical metrology tool. One or more optical properties of the first area are determined based on the first measurement. One or more optical properties of the second area are determined based on the second measurement. The fabrication process is performed on a third area. A third measurement of the third area is obtained using the optical metrology tool. A third value of the process parameter is determined based on the third measurement and a relationship between the determined optical properties of the first and second areas.
    Type: Application
    Filed: February 5, 2008
    Publication date: September 4, 2008
    Applicant: Tokyo Electron Limited
    Inventors: Hanyou Chu, Vi Vuong, Yan Chen