Patents by Inventor Vibhor K. Srivastava

Vibhor K. Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9667564
    Abstract: A method and system are provided for implementing a hierarchical high radix switch with a time-sliced crossbar. The hierarchical high radix switch includes a plurality of inputs and a plurality of outputs. Each input belongs to one input group; each input group sends consolidated requests to each output, by ORing the requests from the local input ports in that input group. Each output port belongs to one output group; each output port grants one of the requesting input groups using a rotating priority defined by a next-to-serve pointer. Each output group consolidates the output port grants and allows one grant to pass back to an input group. Each input port in an input group evaluates all incoming grants in an oldest packet first manner to form an accept. Each input group consolidates the input port accepts and selects one accept to send to the output port.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: May 30, 2017
    Assignee: International Business Machines Corporation
    Inventors: Nikolaos Chrysos, Girish G. Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Mark L. Rudquist, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9479455
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: October 25, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9467396
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 11, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9336169
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: May 10, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9323703
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: April 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Publication number: 20150295858
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 15, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos CHRYSOS, Girish GOPALA KURUP, Cyriel J. MINKENBERG, Anil POTHIREDDY, Vibhor K. SRIVASTAVA, Brian T. VANDERPOOL
  • Publication number: 20150295857
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 15, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos CHRYSOS, Girish GOPALA KURUP, Cyriel J. MINKENBERG, Anil POTHIREDDY, Vibhor K. SRIVASTAVA, Brian T. VANDERPOOL
  • Publication number: 20150095538
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Publication number: 20150095539
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 2, 2015
    Applicant: International Business Machines Corporation
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 8984206
    Abstract: Techniques are disclosed to implement a scheduling scheme for a crossbar scheduler that provides distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a distributed switch. Input and output ports are grouped and assigned a respective arbiter. The input group arbiters communicate requests indicating a count of respective ports having data packets to be transmitted via one of the output ports. The output group arbiter attempts to accommodate the requests for each member of an input group before proceeding to a next input group.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: March 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Publication number: 20150063348
    Abstract: A method and system are provided for implementing a hierarchical high radix switch with a time-sliced crossbar. The hierarchical high radix switch includes a plurality of inputs and a plurality of outputs. Each input belongs to one input group; each input group sends consolidated requests to each output, by ORing the requests from the local input ports in that input group. Each output port belongs to one output group; each output port grants one of the requesting input groups using a rotating priority defined by a next-to-serve pointer. Each output group consolidates the output port grants and allows one grant to pass back to an input group. Each input port in an input group evaluates all incoming grants in an oldest packet first manner to form an accept. Each input group consolidates the input port accepts and selects one accept to send to the output port.
    Type: Application
    Filed: August 28, 2013
    Publication date: March 5, 2015
    Applicant: International Business Machines Corporation
    Inventors: Nikolaos Chrysos, Girish G. Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Mark L. Rudquist, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 8902750
    Abstract: Translating between an Ethernet protocol used by a first network component and a Converged Enhanced Ethernet (CEE) protocol used by a second network component, the first and second components coupled through a CEE Converter that translates by: for data flow from the first network component to the second network component: receiving, by the CEE converter, traffic flow definition parameters for a single CEE protocol data flow; calculating, by a credit manager, available buffer space in an outbound frame buffer of the CEE converter for the data flow; communicating, by the credit manager to a CEE credit driver of the first component, the calculated size of the buffer space together with a start sequence number and a flow identifier; and responding, by the CEE credit driver to the CEE converter, with Ethernet frames comprising a private header that includes the flow identifier and a sequence number.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Anil Pothireddy, Christoph Raisch, Saravanan Sethuraman, Vibhor K. Srivastava, Jan-Bernd Themann, Fabrice J. Verplanken
  • Publication number: 20140122771
    Abstract: Techniques are disclosed to implement a scheduling scheme for a crossbar scheduler that provides distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a distributed switch. Input and output ports are grouped and assigned a respective arbiter. The input group arbiters communicate requests indicating a count of respective ports having data packets to be transmitted via one of the output ports. The output group arbiter attempts to accommodate the requests for each member of an input group before proceeding to a next input group.
    Type: Application
    Filed: October 31, 2012
    Publication date: May 1, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 8589776
    Abstract: Translating between a first communication protocol used by a first network component and a second communication protocol used by a second network, where translating includes: receiving, by a network engine adapter operating independently from the first and second network components, data packets from the first and second network components; and performing, by the network engine, a combined communication protocol based on the first communication protocol and the second communication protocol, including manipulating data packets of at least one of the first communication protocol or the second communication protocol, thereby offloading performance requirements for the combined communication protocol from the first and second network components.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jean L. Calvignac, Daniel G. Eisenhauer, Ashish A. More, Anil Pothireddy, Christoph Raisch, Saravanan Sethuraman, Vibhor K. Srivastava, Jan-Bernd Themann
  • Publication number: 20110302481
    Abstract: Translating between a first communication protocol used by a first network component and a second communication protocol used by a second network, where translating includes: receiving, by a network engine adapter operating independently from the first and second network components, data packets from the first and second network components; and performing, by the network engine, a combined communication protocol based on the first communication protocol and the second communication protocol, including manipulating data packets of at least one of the first communication protocol or the second communication protocol, thereby offloading performance requirements for the combined communication protocol from the first and second network components.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Applicant: International Business Machines Corporation
    Inventors: Jean L. Calvignac, Daniel G. Eisenhauer, Ashish A. More, Anil Pothireddy, Christoph Raisch, Saravanan Sethuraman, Vibhor K. Srivastava, Jan-Bernd Themann
  • Publication number: 20110299394
    Abstract: Translating between an Ethernet protocol used by a first network component and a Converged Enhanced Ethernet (CEE) protocol used by a second network component, the first and second components coupled through a CEE Converter that translates by: for data flow from the first network component to the second network component: receiving, by the CEE converter, traffic flow definition parameters for a single CEE protocol data flow; calculating, by a credit manager, available buffer space in an outbound frame buffer of the CEE converter for the data flow; communicating, by the credit manager to a CEE credit driver of the first component, the calculated size of the buffer space together with a start sequence number and a flow identifier; and responding, by the CEE credit driver to the CEE converter, with Ethernet frames comprising a private header that includes the flow identifier and a sequence number.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Anil Pothireddy, Christoph Raisch, Saravanan Sethuraman, Vibhor K. Srivastava, Jan-Bernd Themann, Fabrice J. Verplanken