Patents by Inventor Vicente Cavanna

Vicente Cavanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060098770
    Abstract: A synchronizer for passing data from a first system that transmits data based on a first clock and a second clock, to a second system that receives data based on a third clock, includes a first set of flip-flops for receiving data from the first system based on the first clock. The synchronizer includes a second set of flip-flops for receiving data from the first system based on the second clock. The synchronizer includes a first multiplexer coupled to outputs of the flip-flops in the first and the second set. The synchronizer includes a controller for controlling the first multiplexer to output data from selected ones of the flip-flops based on the third clock, thereby generating output data to be provided to the second system.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 11, 2006
    Inventors: William Harper, Vicente Cavanna, Roy Stone
  • Publication number: 20060059404
    Abstract: A method of generating a test data pattern for testing a CRC algorithm, the CRC algorithm configured to generate CRC values based on a generator polynomial, the method including identifying a desired pattern of intermediate CRC values. The method includes generating a test data pattern based on the desired pattern of intermediate CRC values and the generator polynomial, wherein the test data pattern is configured to cause the CRC algorithm to generate the desired pattern of intermediate CRC values.
    Type: Application
    Filed: September 13, 2004
    Publication date: March 16, 2006
    Inventors: Vicente Cavanna, Jeffrey Murphy, Dylan Jackson
  • Patent number: 4873703
    Abstract: A synchronizing system is provided for reliably passing data across a boundary between two independent, non-correlated clocks, referred to as the receiving and transmitting clocks. The system reduces occurrence of errors due to asynchronous samplings to an arbitrarily low level based on metastable operation. The system is organized as a two port memory with unit distance code addressing the memory cells. It performs a handshake between the two non-correlated clock systems to allow for any ratio between the two clocks.
    Type: Grant
    Filed: August 19, 1988
    Date of Patent: October 10, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Douglas Crandall, Vicente Cavanna, Pradip Shankar, Rasmus Nordby