Patents by Inventor Vicky P. Duerk

Vicky P. Duerk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Load balancing in a storage system
    Patent number: 8447872
    Abstract: Link level load balancing is provided based on time utilization of a link or workload utilization of a device. Time utilization achieves load balancing by giving each device the same amount of connection time to perform Input/Output tasks. Workload utilization achieves load balancing by managing a number of frames or bytes transmitted to each device.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: May 21, 2013
    Assignee: Intel Corporation
    Inventors: Vicky P. Duerk, Pak-Lung Seto
  • Remote node index mapping mechanism for serial attached storage devices
    Patent number: 7685350
    Abstract: According to one embodiment, a host bus adapter (HBA) is disclosed. The HBA includes a first lookup table to retrieve a remote node index (RNI) based upon an address received from a remote device as a component of an open address frame, a second lookup table to retrieve a remote node context (RNC) based upon the RNI and connection management logic coupled to the second lookup table to control a connection between the HBA and the remote device based upon the RNC.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 23, 2010
    Assignee: Intel Corporation
    Inventors: Vicky P. Duerk, Pak-Iung Seto
  • Load balancing in a storage system
    Publication number: 20080104264
    Abstract: Link level load balancing is provided based on time utilization of a link or workload utilization of a device. Time utilization achieves load balancing by giving each device the same amount of connection time to perform Input/Output tasks. Workload utilization achieves load balancing by managing a number of frames or bytes transmitted to each device.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 1, 2008
    Inventors: Vicky P. Duerk, Pak-Lung Seto
  • Staggered spin-up disable mechanism
    Patent number: 7221531
    Abstract: According to one embodiment, a system is disclosed. The system includes one or more storage devices, a host bus adapter (HBA) and a bridging device coupled between the one or more storage device and the HBA. The bridging device includes a register having bits corresponding to each of the one or more storage devices. Each bit indicates whether staggered spin-up is enabled at a corresponding storage device.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: May 22, 2007
    Assignee: Intel Corporation
    Inventors: Vicky P. Duerk, Nai-Chih Chang, Pak-lung Seto, Victor Lau