Patents by Inventor Victor F. Fleury

Victor F. Fleury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7292076
    Abstract: A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be pulled-up to a logic HIGH voltage, for example, by removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor. A low voltage pull-down circuit may be provided in a power supervision circuit for systems that operate with, for example, low power conditions. The open-drain node is utilized as a power-on-reset node that provides a LOW logic signal to a system when the power being supplied to the system is below a predetermined voltage threshold.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: November 6, 2007
    Assignee: Linear Technology Corporation
    Inventors: Robert P Jurgilewicz, Victor F Fleury, Roger Zemke
  • Patent number: 6949965
    Abstract: A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be easily pulled-up to a logic HIGH voltage, for example, by simply removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: September 27, 2005
    Assignee: Linear Technology Corporation
    Inventors: Robert P. Jurgilewicz, Victor F. Fleury, Roger Zemke