Patents by Inventor Victor Fleury

Victor Fleury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-layer material and method of application
    Patent number: 11078623
    Abstract: A multi-layer material suitable for use as a covering for an article includes a polymeric cellular layer and nonwoven backing layer. The multi-layer material having a creasability angle of between about 20 and about 160 degrees.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: August 3, 2021
    Assignee: NEENAH NORTHEAST, LLC
    Inventors: Jian Ling Ding, Arthur Victor Fleury, Jr., Charles E. Snyder, Jason Curtis Hinkle, Daniel T. Bunker
  • MULTI-LAYER MATERIAL AND METHOD OF APPLICATION
    Publication number: 20130186546
    Abstract: A multi-layer material suitable for use as a covering for an article includes a polymeric cellular layer and nonwoven backing layer. The multi-layer material having a creasability angle of between about 20 and about 160 degrees.
    Type: Application
    Filed: January 23, 2013
    Publication date: July 25, 2013
    Inventors: JIAN LING DING, ARTHUR VICTOR FLEURY, JR., CHARLES E. SNYDER, JASON CURTIS HINKLE, DANIEL T. BUNKER
  • Low voltage pull-down circuit
    Publication number: 20060033539
    Abstract: A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be easily pulled-up to a logic HIGH voltage, for example, by simply removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor. One embodiment includes the low voltage pull-down circuit in a power supervision circuit for systems that operate with, for example, low power conditions. The open-drain node is utilized as a power-on-reset node that provides a LOW logic signal to a system when the power being supplied to the system is below a predetermined voltage threshold.
    Type: Application
    Filed: August 9, 2005
    Publication date: February 16, 2006
    Inventors: Robert Jurgilewicz, Victor Fleury, Roger Zemke