Patents by Inventor Victor Gissin

Victor Gissin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11762581
    Abstract: A method, device, and system for controlling a data read/write command in an NVMe over fabric architecture. In the method provided in the embodiments of the present disclosure, a data processing unit receives a control command sent by a control device, the data processing unit divides a storage space of a buffer unit into at least two storage spaces according to the control command sent by the control device, and establishes a correspondence between the at least two storage spaces and command queues, and after receiving a first data read/write command that is in a first command queue and that is sent by the control device, the data processing unit buffers, in a storage space that is of the buffer unit and that is corresponding to the first command queue, data to be transmitted according to the first data read/write command.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: September 19, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Victor Gissin, Xin Qiu, Pei Wu, Huichun Qu, Jinbin Zhang
  • Patent number: 11636052
    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: April 25, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Publication number: 20230106771
    Abstract: A data processing method for a network adapter includes the network adapter that obtains a first input/output (I/O) command. The first I/O command instructs to write data stored in a local server to at least one remote server, and the first I/O command includes address information and length information that are of the data and that are stored in the local server. The network adapter splits the data based on the address information and the length information to obtain a plurality of groups of address information and length information. The network adapter obtains, from the local server based on the groups of address information and length information, data corresponding to the groups of address information and length information, and sends the data to the at least one remote server.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 6, 2023
    Inventors: Shengwen Lu, Victor Gissin, Junying Li
  • Publication number: 20230059820
    Abstract: Network interface cards (NICs), a network apparatus and a method thereof are disclosed. A NIC comprises: a memory configured to assign a directing context and a network context denoting dynamically allocated resources. The directing context is associated with the network context, and the directing context is associated with queues queueing tasks and designated for execution using a network connection. The NIC further comprises a NIC processing circuitry, which is configured to process the tasks using the steering and network contexts. The directing context is temporarily assigned for use by the network connection during tasks execution, and the network context is assigned for use by the network connection during a lifetime of the network connection. In response to completing execution of the tasks, the association of the directing context with the network context is released while maintaining the assignment of the network context until the network connection is terminated.
    Type: Application
    Filed: October 14, 2022
    Publication date: February 23, 2023
    Inventors: Victor GISSIN, Junying LI, Elena GUREVICH, Huichun QU
  • Patent number: 11579803
    Abstract: In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: February 14, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Publication number: 20230011387
    Abstract: A data processing method and a storage apparatus are disclosed. The data processing method includes: receiving, by an NVMe storage device, an NVMe write command sent by a host, where the NVMe write command carries a key and a value pointer, the value pointer points to first storage space, and the first storage space is used to store a value; obtaining, by the NVMe storage device, the key from the NVMe write command and a value length, and allocating second storage space to the value according to the value length, where the second storage space is in the NVMe storage device; and obtaining, by the NVMe storage device, the value from the host, and storing the value in the second storage space.
    Type: Application
    Filed: September 19, 2022
    Publication date: January 12, 2023
    Inventors: Xin Qiu, Huifeng Xu, Haitao Guo, Hongguang Liu, Huawei Liu, Chunyi Tan, Victor Gissin
  • Patent number: 11467764
    Abstract: A non-volatile memory express (NVMe)-based data read method, apparatus, and system are provided. In various embodiments, a read instruction can be triggered by a host. The read instruction carries indication information of a first address opened by the host to an NVMe controller for addressing and accessing. In those embodiments, the host after obtaining the read instruction can send a data packet to the host. The data packet carries the first address and payload data. Still in those embodiments, the host can, after receiving the data packet, determine a second address based on the first address, and store the payload data into storage space indicated by the second address. The second address may be a private memory address of the host. Because a relationship between the second address and a communication protocol is broken, and the host may access the second address without being restricted by the communication protocol.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: October 11, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Patent number: 11467975
    Abstract: A data processing method and a storage apparatus are disclosed. The data processing method includes: receiving, by an NVMe storage device, an NVMe write command sent by a host, where the NVMe write command carries a key and a value pointer, the value pointer points to first storage space, and the first storage space is used to store a value; obtaining, by the NVMe storage device, the key from the NVMe write command and a value length, and allocating second storage space to the value according to the value length, where the second storage space is in the NVMe storage device; and obtaining, by the NVMe storage device, the value from the host, and storing the value in the second storage space.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: October 11, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xin Qiu, Huifeng Xu, Haitao Guo, Hongguang Liu, Huawei Liu, Chunyi Tan, Victor Gissin
  • Publication number: 20220244861
    Abstract: A data access method implemented by a first computing device includes receiving a second write operation command sent by a second computing device, where the second write operation command is obtained after the second computing device preprocesses a first write operation command generated by a host, and the first write operation command is used to write to-be-written data into a storage pool, and performing a data processing operation on the to-be-written data according to the second write operation command, wherein the first computing device writes processed to-be-written data into the storage pool.
    Type: Application
    Filed: April 18, 2022
    Publication date: August 4, 2022
    Inventors: Tao Li, Victor Gissin, Haixin Yu
  • Publication number: 20220027292
    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.
    Type: Application
    Filed: October 11, 2021
    Publication date: January 27, 2022
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Patent number: 11169938
    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: November 9, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Publication number: 20210109681
    Abstract: In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.
    Type: Application
    Filed: December 22, 2020
    Publication date: April 15, 2021
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Publication number: 20210034284
    Abstract: A non-volatile memory express (NVMe)-based data read method, apparatus, and system are provided. In various embodiments, a read instruction can be triggered by a host. The read instruction carries indication information of a first address opened by the host to an NVMe controller for addressing and accessing. In those embodiments, the host after obtaining the read instruction can send a data packet to the host. The data packet carries the first address and payload data. Still in those embodiments, the host can, after receiving the data packet, determine a second address based on the first address, and store the payload data into storage space indicated by the second address. The second address may be a private memory address of the host. Because a relationship between the second address and a communication protocol is broken, and the host may access the second address without being restricted by the communication protocol.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 4, 2021
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Patent number: 10838665
    Abstract: A control device for a non-volatile memory express (NVMe) over fabric architecture is provided. The control device comprises a network adapter and a processor coupled to the network adapter by a bus. Data is transmitted between the control device and a storage device in the NVMe over fabric architecture. The processor is configured to obtain an available storage space of the storage device, determine whether a storage space required by a first data to be transmitted according to a first data read/write command is equal to or less than the available storage space, and send the first data read/write command to the storage device if the storage space required by the first data is equal or less than to the available storage space and suspend sending of the first data read/write command if the storage space occupied by the first data is greater than the available storage space.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: November 17, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Victor Gissin, Xin Qiu, Pei Wu, Huichun Qu, Jinbin Zhang
  • Publication number: 20200301850
    Abstract: A data processing method and a storage apparatus are disclosed. The data processing method includes: receiving, by an NVMe storage device, an NVMe write command sent by a host, where the NVMe write command carries a key and a value pointer, the value pointer points to first storage space, and the first storage space is used to store a value; obtaining, by the NVMe storage device, the key from the NVMe write command and a value length, and allocating second storage space to the value according to the value length, where the second storage space is in the NVMe storage device; and obtaining, by the NVMe storage device, the value from the host, and storing the value in the second storage space.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Inventors: Xin QIU, Huifeng XU, Haitao GUO, Hongguang LIU, Huawei LIU, Chunyi TAN, Victor GISSIN
  • Patent number: 10705974
    Abstract: A data processing method and a storage apparatus are disclosed. The data processing method includes: receiving, by a non-volatile memory express (NVMe) storage device, an NVMe write command sent by a host, where the NVMe write command carries a key and a value pointer, the value pointer points to first storage space, and the first storage space is used to store a value; obtaining, by the NVMe storage device, the key from the NVMe write command and a value length, and allocating second storage space to the value according to the value length, where the second storage space is in the NVMe storage device; and obtaining, by the NVMe storage device, the value from the host, and storing the value in the second storage space.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: July 7, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xin Qiu, Huifeng Xu, Haitao Guo, Hongguang Liu, Huawei Liu, Chunyi Tan, Victor Gissin
  • Publication number: 20200065264
    Abstract: A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Victor Gissin, Junying Li, Guanfeng Zhou, Jiashu Lin
  • Publication number: 20190272123
    Abstract: A method, device, and system for controlling a data read/write command in an NVMe over fabric architecture. In the method provided in the embodiments of the present disclosure, a data processing unit receives a control command sent by a control device, the data processing unit divides a storage space of a buffer unit into at least two storage spaces according to the control command sent by the control device, and establishes a correspondence between the at least two storage spaces and command queues, and after receiving a first data read/write command that is in a first command queue and that is sent by the control device, the data processing unit buffers, in a storage space that is of the buffer unit and that is corresponding to the first command queue, data to be transmitted according to the first data read/write command.
    Type: Application
    Filed: May 17, 2019
    Publication date: September 5, 2019
    Applicant: HUAWEI TECHNOLOGIES CO.,LTD.
    Inventors: Victor Gissin, Xin Qiu, Pei Wu, Huichun Qu, Jinbin Zhang
  • Publication number: 20180314450
    Abstract: A data read/write command control method and system, and a device in an NVMe over Fabric architecture. According to the method provided in the embodiments of the present disclosure, a data processing unit allocates a first storage space from an available storage space of the cache unit according to a length, carried in the data read/write command, of the data that needs to be transmitted, where the first storage space is less than a storage space of the cache unit, and a first length is less than the length of the data that needs to be transmitted; and sequentially migrates the data that needs to be transmitted according to the data read/write command to a storage space corresponding to a destination address.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 1, 2018
    Applicant: HUAWEI TECHNOLOGIES CO.,LTD.
    Inventors: Xin Qiu, Victor Gissin, Jinbin Zhang
  • Publication number: 20180253386
    Abstract: A data processing method and a storage apparatus are disclosed. The data processing method includes: receiving, by a non-volatile memory express (NVMe) storage device, an NVMe write command sent by a host, where the NVMe write command carries a key and a value pointer, the value pointer points to first storage space, and the first storage space is used to store a value; obtaining, by the NVMe storage device, the key from the NVMe write command and a value length, and allocating second storage space to the value according to the value length, where the second storage space is in the NVMe storage device; and obtaining, by the NVMe storage device, the value from the host, and storing the value in the second storage space.
    Type: Application
    Filed: May 4, 2018
    Publication date: September 6, 2018
    Inventors: Xin Qiu, Huifeng Xu, Haitao Guo, Hongguang Liu, Huawei Liu, Chunyi Tan, Victor Gissin