Patents by Inventor Victor Han

Victor Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240086014
    Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Rungrot Kitsomboonloha, Donggeon Han, Jason N Gomez, Kyung Wook Kim, Nikolaus Hammler, Pei-En Chang, Saman Saeedi, Shih Chang Chang, Shinya Ono, Suk Won Hong, Szu-Hsien Lee, Victor H Yin, Young-Jik Jo, Yu-Heng Cheng, Joyan G Sanctis, Hongwoo Lee
  • Publication number: 20220334203
    Abstract: Systems and methods are provided for multiphotonic magnetic resonance imaging. The system uses one or more (B1,z) RF coils or oscillating gradients oriented along the z-axis to provide multiphoton resonances. The B1,z coils can be implemented as planar coils or solenoids. With the additional coils, standard slice-selective pulse sequences have all standard excitations replaced with multiphoton excitations that excite extra resonances. In vivo imaging using multiphoton excitation has signal to noise ratios comparable to single-photon excitations when similar pulse sequences are used. Since excitation is not bound to the Larmor frequency, new RF pulse sequences can be designed with imaging methods patterned after single-photon excitation concepts.
    Type: Application
    Filed: May 24, 2022
    Publication date: October 20, 2022
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Chunlei Liu, Victor Han
  • Patent number: 10769238
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: September 8, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Publication number: 20200012706
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Application
    Filed: September 19, 2019
    Publication date: January 9, 2020
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Patent number: 10489484
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: November 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Publication number: 20190236113
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Application
    Filed: April 11, 2019
    Publication date: August 1, 2019
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Patent number: 10261978
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Patent number: 10241972
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: March 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Publication number: 20180267938
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Application
    Filed: December 14, 2017
    Publication date: September 20, 2018
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Publication number: 20180267936
    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.
    Type: Application
    Filed: March 16, 2017
    Publication date: September 20, 2018
    Inventors: Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang
  • Publication number: 20130229594
    Abstract: A method for testing photosensitivity of an electronic display module, such as a liquid crystal display module, is provided. In one embodiment, a method includes exposing a display module to light at a first intensity and measuring an amount of light transmitted through the display module. The method may also include exposing the display module to light at a second intensity and measuring an amount of that light transmitted through the display module. The measured amounts may then be compared to determine an optical property, such as photosensitivity, of the display panel. Various other methods, systems, and manufactures are also disclosed.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 5, 2013
    Applicant: Apple Inc.
    Inventors: Moo Kyung Son, Victor Han-En Yin, John Z. Zhong, Wei Chen
  • Patent number: 6613549
    Abstract: The invention relates to probiotic microbes, including but not limited to Lactobacillus species and Bifidobacteria species, and their compositions and methods of employing said compositions for treating and preventing intestinal and other infections which originate from the intestine, in newborn infants. The invention also invention relates to the ability of probiotic organisms, either in viable or nonviable state, or their by-products, to interfere with pathogenic infection through short and long term colonization of the intestine, inhibition of growth of the pathogens, and assisting the host to fight off the infecting organisms.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: September 2, 2003
    Assignee: Urex Biotech, Inc.
    Inventors: Gregor Reid, Andrew W. Bruce, Victor Han
  • Publication number: 20010036453
    Abstract: The invention relates to probiotic microbes, including but not limited to Lactobacillus species and Bifidobacteria species, and their compositions and methods of employing said compositions for treating and preventing intestinal and other infections which originate from the intestine, in newborn infants. The invention also invention relates to the ability of probiotic organisms, either in viable or nonviable state, or their by-products, to interfere with pathogenic infection through short and long term colonization of the intestine, inhibition of growth of the pathogens, and assisting the host to fight off the infecting organisms.
    Type: Application
    Filed: February 9, 2001
    Publication date: November 1, 2001
    Applicant: UREX BIOTECH INC.
    Inventors: Gregor Reid, Andrew W. Bruce, Victor Han