Abstract: A method for forming bipolar semiconductor devices and compiementary metal-oxide semiconductor (CMOS) field effect devices on a single crystal substrate wherein source and drain contact regions of one of the CMOS devices is formed simultaneously with the formation of a base region of the bipolar device and source and drain contact regions of the other one of the CMOS devices are formed simultaneously with the emitter region of the bipolar device.

Abstract: A collector diffused isolation transistor wherein the normal buried layer in the substrate of the device is utilized as a collector region, an isolation region of the same conductivity type as the buried layer being formed by ion implantation of suitable atoms in the buried layer region with a second similar ion implantation in the surface of the epitaxial layer of second conductivity type grown over the substrate and buried layer, the collector diffused isolation region being formed by the up diffusion of the lower ion implanted region into the grown layer and the down diffusion of the upper ion implanted region into the grown layer so that the up and down diffusions overlap. Complimentary devices such as PNP and NPN devices are made on the same substrate utilizing this novel technique.