Patents by Inventor Victor Pol

Victor Pol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor wafer having scribe lane alignment marks for reducing crack propagation
    Patent number: 8502324
    Abstract: A wafer including at least a first die and at least a second die, wherein the first die and the second die are separated from each other by an area located between the first die and the second die, is provided. The wafer further includes an alignment mark group used for aligning the wafer to a tool used for patterning the wafer. The alignment mark group is located entirely within the area between the first die and the second die and the alignment mark group includes a plurality of alignment lines, and wherein each line of the plurality of alignment lines is formed using a plurality of segments separated from each other by a plurality of gaps filled with an insulating material.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: August 6, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Victor Pol, Chong-Cheng Fu
  • SEMICONDUCTOR WAFER HAVING SCRIBE LANE ALIGNMENT MARKS FOR REDUCING CRACK PROPAGATION
    Publication number: 20110089581
    Abstract: A wafer including at least a first die and at least a second die, wherein the first die and the second die are separated from each other by an area located between the first die and the second die, is provided. The wafer further includes an alignment mark group used for aligning the wafer to a tool used for patterning the wafer. The alignment mark group is located entirely within the area between the first die and the second die and the alignment mark group includes a plurality of alignment lines, and wherein each line of the plurality of alignment lines is formed using a plurality of segments separated from each other by a plurality of gaps filled with an insulating material.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 21, 2011
    Inventors: Victor Pol, Chong-Cheng Fu