Abstract: Disclosed is a method and apparatus for calibrating phased array receiving antennas that includes circuitry for generating a pair of calibration signals separable one from the other. The signals are injected into the delay elements of the antenna from opposite ends of a complementary calibration cable. The delay produced in the calibration signals is individually measured, and the delays summed and averaged to produce a delay measurement independent of delays produced by the calibration cable and accordingly delay measurement variations caused by environmental effects on the calibration cable.

Abstract: An improved high speed word generator (30) which includes a white noise generator (12) for providing first and second bits and exclusive or (XOR) means (32) for providing an output signal which is the exclusive or of said first and second bits. In an alternative embodiment, the invention provides an improved N-bit high speed word generator including noise generator means for providing N bits, either through N one bit noise generators or one one bit noise generator and means for storing the output thereof, and exclusive or (XOR) means for providing M stages of N output signals the first stage of which provides N output signals each of which is the exclusive or of two of said bits and the subsequent stages of which provide N output signals each of which is the exclusive or of the output of the previous stage and an output of said noise generator means.

Abstract: A sine output or phase interpolation direct digital synthesizer for use in satellite programs having a random or pseudorandom code generator for summing a random digital word whose value ranges from zero to just under the least significant bit of a digital-to-analog converter with the current register value normally sent to the converter for reducing the spurious sidebands associated with the finite resolution of the converter within the synthesizer, the sum being truncated to the resolution of the converter and for controlling the converter, the spurious sidebands being reduced by randomization of the periodic behavior associated with the truncation process while lowering the total phase noise.

Abstract: A phase lock loop frequency synthesizer for providing a synthesized frequency signal employing a modified adaptive loop construction having parallel feedback paths about a loop amplifier. A normal feedback path having a narrow bandwidth characteristic includes a feedback capacitor having one end connected to electrical ground via a controlled switch and a second feedback path having a wide bandwidth characteristic with a capacitor also connected across the amplifier. Upon the variation of an incoming reference signal, the controlled switch connects the normal feedback capacitor to ground permitting the wide bandwidth feedback path to rapidly settle the loop while charging the feedback capacitor of the normal feedback path. Upon opening the controlled switch, the narrow bandwidth feedback path completes the charging of the feedback capacitor of the normal feedback loop settling the loop to the steady state condition while enhancing the settling time.

Abstract: A method and apparatus for reducing the introduction of alias frequencies in the processing of signals. A sequence of jittered pulses is provided, each pulse occurring during one of a sequence of time intervals of duration T at a time determined by a sequential one of a set of independent random numbers having a uniform probability density in a region bounded by zero and T. A signal processing operation, such as sampling a signal or synthesizing a signal having a desired frequency specified by a control signal, is performed in response to the jittered pulses. Setup time aliasing is avoided by alternating between two signal processors, each driven by one of a pair of phase-related sequences of jittered pulses, or, in the case of a frequency synthesizer, by jittering the output signal rather than the input pulses. Phase noise in a synthesized signal is reduced by scaling the control signal according to the durations of the time intervals between successive jittered pulses.

Abstract: A direct digital frequency synthesizer including a counter circuit for receiving input signal pulses and for providing a corresponding output signal after receiving a number of input signal pulses, the number being selected based on the state of a control signal. The invention includes a circuit for generating a substantially random sequence of numbers and a comparator circuit for comparing a respective number of the substantially random numbers to a predetermined number and for providing the control signal in response thereto.

Abstract: A low noise RF signal phase comparator comprised of two high stability driver-buffer amplifiers (16 and 18) driving a double balanced mixer (14) which operate to generate a beat frequency between the two RF input signals coupled to the amplifiers from the RF sources. The beat frequency output from the mixer is applied to a low noise zero crossing detector (20) which generates a square wave output whose positive and negative going edges provide a measure of the phase difference between the two RF inputs. Temperature stability is provided by mounting the amplifiers (16 and 18) and mixer (14) on a common circuit board (29) with the active circuit elements (62, 68, 70, 82, 88, 90, 110) thereof being located on one side of a circuit board (29) while the passive circuit elements (112) are located on the opposite side.

Abstract: An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator (26), a single transistor (22), and an integrated circuit operational amplifier (24) mounted on a circuit board (80) such that passive circuit elements (92) are located on side of the circuit board while the active circuit elements (22, 24, 26) are located on the other side. The active circuit elements are embedded in a common heat sink (70) so that a common temperature reference is provided for changes in ambient temperature. The single transistor (22) and operational amplifier (24) are connected together to form a feedback amplifier powered from the voltage regulator (26) with transistor (22) implementing primarily the desired signal gain while the operational amplifier (24) implements signal isolation. Further RF isolation is provided by the voltage regulator (26) which inhibits cross-talk from other like amplifiers powered from a common power supply.

Abstract: A maser functioning as a frequency standard stable to one part in 10.sup.14 includes a variable volume, constant surface area storage bulb having a fixed volume portion located in a resonant cavity from which the frequency standard is derived. A variable volume portion of the bulb, exterior to the resonant cavity, has a maximum volume on the same order of magnitude as the fixed volume bulb portion. The cavity has a length to radius ratio of at least 3:1 so that the operation is attained without the need for a feedback loop. A baffle plate, between the fixed and variable volume bulb portions, includes apertures for enabling hydrogen atoms to pass between the two bulb portions and is an electromagnetic shield that prevents coupling of the electromagnetic field of the cavity into the variable volume bulb portion. The maser is operated so that the zero wall shift frequency thereof can be determined by being operated at first and second very accurately controlled temperatures for identical small and large volumes.

Abstract: The phase and/or period stability of a device being tested is determined by connecting the device in one orthogonal arm of a phase detector having a mixer. In the other arm is an adjustable, variable phase shift device, such as a line stretcher. The output of the mixer is fed through an active low pass filter to derive a DC voltage indicative of the phase shift of the tested device. Initially, the variable phase device is adjusted so that the DC voltage is approximately zero to nullify the phase shift of the tested device under normal conditions. The DC voltage level is converted into a time interval indicative of the phase change of the tested device by determining when the level equals the amplitude of a low frequency ramp voltage that functions similar to a beat frequency output of a prior art dual mixer detector.