Patents by Inventor Victor SIZOV
Victor SIZOV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12331426Abstract: A wafer suitable for epitaxial growth of gallium nitride (GaN) in a Metal Oxide Chemical Vapor Deposition (MOCVD) process. The wafer includes a silicon substrate having a front side and a back side and an edge extending between the front side and the back side, the edge including a front bevel surface connected to the front side and a back bevel surface connected to the back side, wherein the silicon substrate comprises an oxygen denuded silicon layer surrounding a core. The wafer further includes a protection layer being a thermally grown silicon oxide (SiO2) layer substantially covering the front bevel surface and the back bevel surface of the edge, while leaving at least a central region of the front side of the silicon substrate exposed, for preventing meltback during the MOCVD process.Type: GrantFiled: August 25, 2021Date of Patent: June 17, 2025Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBHInventors: Victor Sizov, Karl-Heinz Stegemann, Ronny Mueller-Biedermann, Thomas Lindner
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Patent number: 11923445Abstract: A semiconductor contact structure including a two-dimensional electron gas (2DEG) between a first and a second semiconductor layer and a silicon implant extending into at least a part of the first semiconductor layer and into at least a part of the second semiconductor layer and connected to the 2DEG along an interface between the 2DEG and the silicon implant, wherein the interface has a nonlinear shape. The structure further includes a contact connected to the 2DEG via the silicon implant.Type: GrantFiled: April 22, 2021Date of Patent: March 5, 2024Assignee: X-FAB DRESDENT GMBH & CO. KGInventor: Victor Sizov
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Patent number: 11417757Abstract: A semiconductor arrangement including a substrate, a dielectric layer, and a semiconductor layer disposed between the substrate and the dielectric layer. The arrangement further includes an ohmic contact including a plurality of metal contact fragments located in a plurality of trenches formed in the dielectric layer, and a metallic connector layer electrically connecting the metal contact fragments. The ohmic contact electrically connects the metallic connector layer to the semiconductor layer.Type: GrantFiled: January 18, 2019Date of Patent: August 16, 2022Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBHInventor: Victor Sizov
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Patent number: 11355578Abstract: We disclose herein a high voltage device comprising: a first electrode; a second electrode disposed underneath and spaced from the first electrode; and a dielectric layer disposed between the first and second electrodes, wherein the first electrode extends further in at least one lateral direction in respect of the second electrode.Type: GrantFiled: January 22, 2020Date of Patent: June 7, 2022Assignee: X-FAB DRESDEN GMBH & CO.KGInventors: Victor Sizov, Denis Reso
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Publication number: 20210381126Abstract: A wafer suitable for epitaxial growth of gallium nitride (GaN) in a Metal Oxide Chemical Vapor Deposition (MOCVD) process. The wafer includes a silicon substrate having a front side and a back side and an edge extending between the front side and the back side, the edge including a front bevel surface connected to the front side and a back bevel surface connected to the back side, wherein the silicon substrate comprises an oxygen denuded silicon layer surrounding a core. The wafer further includes a protection layer being a thermally grown silicon oxide (SiO2) layer substantially covering the front bevel surface and the back bevel surface of the edge, while leaving at least a central region of the front side of the silicon substrate exposed, for preventing meltback during the MOCVD process.Type: ApplicationFiled: August 25, 2021Publication date: December 9, 2021Applicant: X-FAB Semiconductor Foundries GmbHInventors: Victor Sizov, Karl-Heinz Stegemann, Ronny Mueller-Biedermann, Thomas Lindner
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Publication number: 20210336041Abstract: A semiconductor contact structure including a two-dimensional electron gas (2DEG) between a first and a second semiconductor layer and a silicon implant extending into at least a part of the first semiconductor layer and into at least a part of the second semiconductor layer and connected to the 2DEG along an interface between the 2DEG and the silicon implant, wherein the interface has a nonlinear shape. The structure further includes a contact connected to the 2DEG via the silicon implant.Type: ApplicationFiled: April 22, 2021Publication date: October 28, 2021Inventor: Victor SIZOV
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Publication number: 20200235197Abstract: We disclose herein a high voltage device comprising: a first electrode; a second electrode disposed underneath and spaced from the first electrode; and a dielectric layer disposed between the first and second electrodes, wherein the first electrode extends further in at least one lateral direction in respect of the second electrode.Type: ApplicationFiled: January 22, 2020Publication date: July 23, 2020Inventors: Victor SIZOV, Denis RESO
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Publication number: 20190390365Abstract: A wafer suitable for epitaxial growth of gallium nitride (GaN) in a Metal Oxide Chemical Vapor Deposition (MOCVD) process. The wafer includes a silicon substrate having a front side and a back side and an edge extending between the front side and the back side, the edge including a front bevel surface connected to the front side and a back bevel surface connected to the back side, wherein the silicon substrate comprises an oxygen denuded silicon layer surrounding a core. The wafer further includes a protection layer being a thermally grown silicon oxide (SiO2) layer substantially covering the front bevel surface and the back bevel surface of the edge, while leaving at least a central region of the front side of the silicon substrate exposed, for preventing meltback during the MOCVD process.Type: ApplicationFiled: June 21, 2019Publication date: December 26, 2019Applicant: X-FAB Semiconductor Foundries GmbHInventors: Victor Sizov, Karl-Heinz Stegemann, Ronny Mueller-Biedermann, Thomas Lindner
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Patent number: 10446675Abstract: A High Electron Mobility Transistor comprising a source and a drain, a III-N buffer layer and a III-N barrier layer jointly forming a 2DEG in the buffer layer between the source and the drain, a first gate electrode configured to receive a gate bias voltage and a second gate electrode located between the drain and the first gate and conductively connected to the source via the 2DEG.Type: GrantFiled: August 22, 2018Date of Patent: October 15, 2019Assignee: X-FAB SEMICONDUCTOR FOUNDRIES AGInventor: Victor Sizov
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Publication number: 20190245073Abstract: A semiconductor arrangement including a substrate, a dielectric layer, and a semiconductor layer disposed between the substrate and the dielectric layer. The arrangement further includes an ohmic contact including a plurality of metal contact fragments located in a plurality of trenches formed in the dielectric layer, and a metallic connector layer electrically connecting the metal contact fragments. The ohmic contact electrically connects the metallic connector layer to the semiconductor layer.Type: ApplicationFiled: January 18, 2019Publication date: August 8, 2019Applicant: X-FAB Semiconductor Foundries AGInventor: Victor SIZOV
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Publication number: 20190067465Abstract: A High Electron Mobility Transistor comprising a source and a drain, a III-N buffer layer and a III-N barrier layer jointly forming a 2DEG in the buffer layer between the source and the drain, a first gate electrode configured to receive a gate bias voltage and a second gate electrode located between the drain and the first gate and conductively connected to the source via the 2DEG.Type: ApplicationFiled: August 22, 2018Publication date: February 28, 2019Inventor: Victor SIZOV