Patents by Inventor Victor Temple

Victor Temple has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190288096
    Abstract: The present disclosure relates to four-layer latching devices having improved reverse current capabilities. The devices have a localized doping spike region in the upper base region, the lower base region, or both. The localized doping spike regions have a localized doping concentration that is greater than the doping concentration of the layer where the localized doping spike region is located. Within the base regions the localized spikes are located next to the corresponding upper emitter region, lower emitter region, or both.
    Type: Application
    Filed: February 15, 2019
    Publication date: September 19, 2019
    Inventor: Victor A. TEMPLE
  • Patent number: 9543932
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: January 10, 2017
    Assignee: Silicon Power Corporation
    Inventors: Boris Reshetnyak, Dante E. Piccone, Victor Temple
  • Publication number: 20160028390
    Abstract: A circuit for turning OFF a thyristor. The circuit includes at least one first circuit element configured to provide a high reverse turn-OFF voltage to the thyristor gate for a predetermined period of time. Immediately following the predetermined period of time, at least one second circuit element provides a normal reverse turn-OFF voltage to the thyristor gate. The normal reverse turn-OFF voltage is substantially lower than the high reverse turn-OFF voltage.
    Type: Application
    Filed: October 8, 2015
    Publication date: January 28, 2016
    Inventors: Boris RESCHETNYAK, Victor TEMPLE, Dante E. PICCONE, Thomas R. PETERSON
  • Patent number: 9159790
    Abstract: A circuit for turning OFF a thyristor. The circuit includes at least one first circuit element configured to provide a high reverse turn-OFF voltage to the thyristor gate for a predetermined period of time. Immediately following the predetermined period of time, at least one second circuit element provides a normal reverse turn-OFF voltage to the thyristor gate. The normal reverse turn-OFF voltage is substantially lower than the high reverse turn-OFF voltage.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: October 13, 2015
    Assignee: Silicon Power Corporation
    Inventors: Boris Reshetnyak, Victor Temple, Dante E. Piccone, Thomas R. Peterson
  • Publication number: 20150236685
    Abstract: A circuit for turning OFF a thyristor. The circuit includes at least one first circuit element configured to provide a high reverse turn-OFF voltage to the thyristor gate for a predetermined period of time. Immediately following the predetermined period of time. at least one second circuit element provides a normal reverse turn-OFF voltage to the thyristor gate. The normal reverse turn-OFF voltage is substantially lower than the high reverse turn-OFF voltage.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Inventors: Boris RESHETNYAK, Victor TEMPLE, Dante E. PICCONE
  • Publication number: 20150061751
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 5, 2015
    Inventors: Boris RESHETNYAK, Dante E. PICCONE, Victor TEMPLE
  • Patent number: 8970286
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: March 3, 2015
    Assignee: Silicon Power Corporation
    Inventors: Boris Reshetnyak, Dante E. Piccone, Victor Temple
  • Patent number: 8866534
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: October 21, 2014
    Assignee: Silicon Power Corporation
    Inventors: Boris Reshetnyak, Dante E. Piccone, Victor Temple
  • Publication number: 20140035655
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Application
    Filed: October 2, 2013
    Publication date: February 6, 2014
    Inventors: Boris RESHETNYAK, Dante E. Piccone, Victor Temple
  • Patent number: 8575990
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 5, 2013
    Assignee: Silicon Power Corporation
    Inventors: Boris Reshetnyak, Dante E. Piccone, Victor Temple
  • Publication number: 20130093498
    Abstract: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.
    Type: Application
    Filed: October 14, 2011
    Publication date: April 18, 2013
    Inventors: Boris RESHETNYAK, Dante E. PICCONE, Victor TEMPLE
  • Patent number: 6274892
    Abstract: One embodiment of a semiconductor device includes a laterally extending semiconductor base, a buffer adjacent the base and having a first conductivity type dopant, and a laterally extending emitter adjacent the buffer and opposite the base and having a second conductivity type dopant. The buffer is relatively thin and has a first conductivity type dopant concentration greater than a second conductivity type dopant concentration in adjacent emitter portions to provide a negative temperature coefficient for current gain and a positive temperature coefficient for forward voltage for the device. The buffer may be silicon or germanium. A low temperature bonded interface may be between the emitter and the buffer or the buffer and the base. Another embodiment of a device may include a laterally extending localized lifetime killing portion between oppositely doped first and second laterally extending portions.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: August 14, 2001
    Assignee: Intersil Americas Inc.
    Inventors: Francis J. Kub, Victor Temple, Karl Hobart, John Neilson
  • Patent number: 6194290
    Abstract: A method for making at least one semiconductor power device with current conduction in a vertical direction from a plurality of semiconductor substrates includes processing at least one surface of each of two semiconductor substrates to form at least one of a metal layer and a doped region. The substrates are bonded together so that the at least one processed surface of each of the two semiconductor substrates define outer surfaces of the semiconductor device. The method further includes annealing the bonded together substrates at an anneal temperature so as to not adversely effect the processed surfaces. The method allows the making of a double sided semiconductor power device with a reduction in the number of sequential processing steps. The direct bonding approach allows current production recipes for fabricating single sided power devices to be used without requiring a separate process sequence.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: February 27, 2001
    Assignee: Intersil Corporation
    Inventors: Francis J. Kub, Victor Temple, Karl Hobart, John Neilson
  • Patent number: 6153495
    Abstract: A method for making a semiconductor device from a plurality of semiconductor substrates includes the steps of: processing at least one surface of at least one of the substrates; thinning at least one of the substrates; bonding the processed and thinned substrates together so that the at least one processed surface defines an outer surface of the semiconductor device; and annealing the bonded together substrates at a relatively low anneal temperature so as to not adversely effect the at least one processed surface. The step of thinning preferably comprises removing a surface portion of the least one substrate opposite the processed surface, to a thickness of less than about 200 .mu.m. A gettering layer may be formed for the at least one substrate prior to thinning. Accordingly, the step of thinning removes the gettering layer. An implanted region may be formed at a surface of the at least one substrate opposite the processed surface prior to bonding.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: November 28, 2000
    Assignee: Intersil Corporation
    Inventors: Francis J. Kub, Victor Temple, Karl Hobart, John Neilson
  • Patent number: 5208575
    Abstract: A chemically augmented electrical fuse is triggered using optical energy acquired as a result of the triggering of another chemically augmented fuse. Light energy created as a result of the detonation of the first chemically augmented fuse is conducted to an exothermic pellet of a second fuse. The light energy received at the second fuse is focused on the exothermic pellet by means of a lens. The focused light energy causes the detonation of the exothermic pellet in the second fuse thereby causing the interruption of current through that fuse.
    Type: Grant
    Filed: January 10, 1992
    Date of Patent: May 4, 1993
    Assignee: General Electric Company
    Inventor: Victor Temple
  • Patent number: 4958211
    Abstract: An MOS controlled thyristor (MCT) provides insulated gate control of turn-off from the regenerative state for arbitrarily large currents. An emitter region of the thyristor is provided with a high injection efficiency portion which is resistively connected to an ohmic contact to the main power electrode for that emitter region. The turn-off gate controls a channel region through that emitter region which connects a source region to the adjacent base region. During gate induced turn-off, the resistive connection of the high efficiency emitter region to the power electrode provides an additional voltage drop over that of a forward biased junction to encourage the flow of carriers through the channel region into the source region to bypass the emitting junction.
    Type: Grant
    Filed: September 1, 1988
    Date of Patent: September 18, 1990
    Assignee: General Electric Company
    Inventor: Victor A. Temple