Abstract: An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of the layer in which an edge termination is implemented, such as a drift layer or a channel layer. The electric field stop layer may be created by selectively masking the peripheries of the device during the device processing, i.e., mesa etch, to protect and preserve the highly doped material at the peripheries of the device.

Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.

Abstract: A structure for use in a static induction transistor includes a semiconductor body having first and second semiconductor layers on a substrate, with the second layer having a dopant concentration of around an order of magnitude higher than the dopant concentration of the first layer. A plurality of sources are located on the second layer. A plurality of gates are ion implanted in the second layer, an end one of the gates being connected to all of the plurality of gates and constituting a gate bus. The gate bus has an extension connecting the gate bus in the second layer of higher dopant concentration to the first layer of lower dopant concentration. The extension is ion implanted in either a series of steps or a sloping surface which is formed in the first and second layers.

Abstract: A structure for use in a static induction transistor includes a semiconductor body having first and second semiconductor layers on a substrate, with the second layer having a dopant concentration of around an order of magnitude higher than the dopant concentration of the first layer. A plurality of sources are located on the second layer. A plurality of gates are ion implanted in the second layer, an end one of the gates being connected to all of the plurality of gates and constituting a gate bus. The gate bus has an extension connecting the gate bus in the second layer of higher dopant concentration to the first layer of lower dopant concentration. The extension is ion implanted in either a series of steps or a sloping surface which is formed in the first and second layers.