Patents by Inventor Victor Webber

Victor Webber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for integrating software schedulers and hardware interrupts for a deterministic system
    Patent number: 8572619
    Abstract: The problem which is being addressed by this invention is the lack of determinism in mass market operating systems. This invention provides a mechanism for mass market operating systems running on mass market hardware to be extended to create a true deterministic responsive environment. This is accomplished through programming hardware elements of the scheduler to behave deterministically with respect to the software scheduler.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: October 29, 2013
    Assignee: Real Time, Inc.
    Inventor: Victor Webber
  • System and method for integrating software schedulers and hardware interupts for a deterministic system
    Publication number: 20110185362
    Abstract: The problem which is being addressed by this invention is the lack of determinism in mass market operating systems. This invention provides a mechanism for mass market operating systems running on mass market hardware to be extended to create a true deterministic responsive environment. This is accomplished through programming hardware elements of the scheduler to behave deterministically with respect to the software scheduler.
    Type: Application
    Filed: January 27, 2011
    Publication date: July 28, 2011
    Inventor: Victor Webber
  • Apparatus and method for decreasing the response times of interrupt service routines
    Patent number: 6412035
    Abstract: A method and system for allowing interrupt service routines to minimize the latency between the occurrence of a hardware interrupt signal and the execution of a modular interrupt service routine. In a preferred embodiment, a method for allowing modular interrupt service routines to be inserted in the hierarchy of a MS Windows protected mode operating system modules in a manner which minimizes the above mentioned latencies for the hardware interrupt request line 0 (IRQ 0). In another embodiment, a method for allowing modular interrupt service routines to be inserted in the hierarchy of MS Windows protected mode operating system modules in a manner which minimizes the above mentioned latencies for all hardware interrupt request lines (IRQs) signals other than IRQ 0.
    Type: Grant
    Filed: January 29, 1998
    Date of Patent: June 25, 2002
    Assignee: Real Time, Inc.
    Inventor: Victor Webber