Abstract: Defect analysis of a semiconductor die is enhanced in a manner that makes possible the viewing of spatial manifestations of the defect from virtually any angle. According to an example embodiment of the present invention, substrate is removed from a semiconductor die while simultaneously obtaining images of the portions of the die from which substrate is being removed. The images are taken at various points in the substrate removal process, recorded and combined together to form a three-dimensional image of selected portions of the die. The image is then used to view the selected portions, and the nature of one or more defects therein are analyzed.

Abstract: According to an example embodiment of the present invention a semiconductor die having a resistive electrical connection is analyzed. Heat is directed to the die as the die is undergoing a state-changing operation to cause a failure due to suspect circuitry. The die is monitored, and a circuit path that electrically changes in response to the heat is detected and used to detect that a particular portion therein of the circuit is resistive. In this manner, the detection and localization of a semiconductor die defect that includes a resistive portion of a circuit path is enhanced.

Abstract: Analysis of a semiconductor die is enhanced by the stimulation the die and the detection of a response to the stimulation. According to an example embodiment of the present invention, a semiconductor die is analyzed using indirect stimulation of a portion of the die, and detecting a response therefrom. First, selected portion of circuitry within the die is stimulated. The stimulation of the selected portion induces a second portion of circuitry within the die to generate an external emission. The emission is detected and the die is analyzed therefrom. In one particular implementation, a response from the selected portion is inhibited from interfering with the detection of the emission from the second portion of circuitry.

Abstract: A method and apparatus for locating integrated circuit defects associated with different aspects of the integrated circuit industry. The integrated circuit is configured in a known failing mode, with a first power supply providing a constant voltage and variable current. Next, one or more additional dedicated power supplies are connected to various points of interest throughout the integrated circuit, wherein these dedicated power supplies have a preset current and the voltage is allowed to vary. The integrated circuit is then scanned with a laser beam, which induces current changes on in the integrated circuit especially in defective areas. These current changes then cause voltage changes on the dedicated power supplies. When such a voltage change occurs on the dedicated power supplies, its position is noted.

Abstract: An apparatus and method are presented for identifying and mapping functional failures in an integrated circuit (IC) due to timing errors therein based on the generation of functional failures in the IC. This is done by providing a set of input test vectors to the IC and adjusting one or more: of the IC voltage, temperature or clock frequency; the rate at which the test vectors are provided to the IC; or the power level of a focused laser beam used to probe the IC and produce localized heating which changes the incidence of the functional failures in the IC which can be sensed for locating the IC circuit elements responsible for the functional failures. The present invention has applications for optimizing the design and fabrication of ICs, for failure analysis, and for qualification or validation testing of ICs.

Abstract: A semiconductor device is manufactured and tested post-manufacture using a probe point extending into the backside of a flip-chip device. During manufacture, a trench is formed in a portion of the backside of the device. At least a portion of the trench is filled with conductive material to provide a probe. After the device is manufactured, circuitry adjacent the probe point is tested. The testing includes milling the backside of the semiconductor device to access the probe, and then coupling energy from the probe to acquire a waveform.

Abstract: A method and apparatus mechanism for testing data processing devices are implemented. The test mechanism isolates critical paths by correlating a scanning microscope image with a selected speed path failure. A trigger signal having a preselected value is generated at the start of each pattern vector. The sweep of the scanning microscope is controlled by a computer, which also receives and processes the image signals returned from the microscope. The value of the trigger signal is correlated with a set of pattern lines being driven on the DUT. The trigger is either asserted or negated depending the detection of a pattern line failure and the particular line that failed. In response to the detection of the particular speed path failure being characterized, and the trigger signal, the control computer overlays a mask on the image of the device under test (DUT).

Abstract: A method and system providing spatial and timing resolution for photoemission microscopy of an integrated circuit. A microscope having an objective lens forming a focal plane is arranged to view the integrated circuit, and an aperture element having an aperture is optically aligned in the back focal plane of the microscope. The aperture element is positioned for viewing a selected area of the integrated circuit. A position-sensitive avalanche photo-diode is optically aligned with the aperture to detect photoemissions when test signals are applied to the integrated circuit.

Abstract: According to an example embodiment of the present invention, an electronic circuit is formed upon a front side surface of a semiconductor device having a back side opposite the front side. At least one layer of antireflective material is formed within substrate in the semiconductor device. The circuit is stimulated and a response is analyzed. The use of the antireflective layer reduces interference generated by reflections and improves the ability to analyze the circuit.

Abstract: Methods for analyzing temperature characteristics of an integrated circuit. In one embodiment, a beam of laser light is directed at the back side of an integrated circuit. The intensity level of laser light reflected from the integrated circuit is measured and compared to a reference intensity level. The magnitude of the difference between the reference intensity level and the intensity level of the reflected laser light is indicative of a temperature characteristic of the integrated circuit.

Abstract: According to one example embodiment, a latch-up condition in a semiconductor device is detected using a method involving use of a laser beam to scan through the backside of the semiconductor device and to ascertain an intensity threshold that is known to cause latch-up conditions. The intensity of the beam is altered and applied to designated regions within the semiconductor device to create latch-up at certain regions but not other regions. A latch-up condition present at a designated region is then detected using conventional microscopy equipment.

Abstract: According to one aspect of the disclosure, the present invention provides methods and arrangements for milling the substrate of a semiconductor device to expose a selected region in the substrate, wherein the semiconductor device has a grid formed in the device to provide lateral and depth position indication during an etch/milling process. In an example implementation, the grid is three dimensional and is used during device analysis for navigation while removing substrate to access a selected circuit area via the backside of flip-chip device. As substrate is removed, the tools are aligned as indicated by the grid.

Abstract: A system for determining the endpoint associated with removing silicon from the backside of a flip chip type die includes a tool for removing silicon and a light source for directing light to the backside of the die. An electrical measuring apparatus, such as a voltmeter, ammeter or oscilloscope, is attached across the output pins of a package to which the die is attached. The light or ions directed toward the backside of the die induce a current in the devices formed in the semiconductor. The value of the current or voltage output depends on the thickness of material between the endpoint on the backside of the die and the devices in the epitaxial layer of the die. The induced signal can be monitored to determine the thickness. Silicon can be removed globally until the thickness is reasonable such that a local thinning tool can be used to remove silicon to get to the area of interest in a reasonable amount of time. The induced current can be monitored during local thinning.

Abstract: Methods for analyzing temperature characteristics of an integrated circuit. In one embodiment, a beam of laser light is directed at the back side of an integrated circuit. The intensity level of laser light reflected from the integrated circuit is measured and compared to a reference intensity level. The magnitude of the difference between the reference intensity level and the intensity level of the reflected laser light is indicative of a temperature characteristic of the integrated circuit.

Abstract: Various methods are described for analyzing an electronic circuit formed upon a frontside surface of a semiconductor substrate having opposed frontside and backside surfaces. Each method includes forming a layer of an antireflective coating material upon the backside surface of the substrate prior to detecting electromagnetic radiation emanating from the backside surface. The layer of an antireflective coating material reduces reflections which contribute to background noise levels. As a result of reduced background noise levels, the detection capabilities of the methods and the resolutions of any scanned images produced using the methods are improved. A first method includes forming a layer of an antireflective coating material upon the backside surface of the substrate, directing a beam of electromagnetic radiation toward the backside surface of the substrate, and detecting an electrical response from the electronic circuit.

Abstract: A system for determining the endpoint associated with removing silicon from the backside of a flip chip type die includes a tool for removing silicon and a light source for directing light to the backside of the die. An electrical measuring apparatus, such as a voltmeter, ammeter or oscilloscope, is attached across the output pins of a package to which the die is attached. The light or ions directed toward the backside of the die induce a current in the devices formed in the semiconductor. The value of the current or voltage output depends on the thickness of material between the endpoint on the backside of the die and the devices in the epitaxial layer of the die. The induced signal can be monitored to determine the thickness. Silicon can be removed globally until the thickness is reasonable such that a local thinning tool can be used to remove silicon to get to the area of interest in a reasonable amount of time. The induced current can be monitored during local thinning.

Abstract: An emission microscope system includes in various embodiments a catadioptric optical microscope and/or a computer automated optical dispensing system and/or a cryogenically cooled back thinned CCD camera. The system also includes a computer controlled data acquisition system with specially tailored software.