Patents by Inventor Vidhu Gupta

Vidhu Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Error correction scheme in flash memory
    Patent number: 10936415
    Abstract: An error correction scheme in flash memory. Methods include extending a lifetime of a memory block, including: receiving an indication that an error occurred during a write operation at a first location in a memory block, the first location associated with a faulty page of the memory block; and performing a modified exclusive OR (XOR) scheme on the memory block by: performing a de-XOR operation that generates recovery data of the faulty page; storing the recovery data in a location different from the faulty page of memory; marking the faulty page for exclusion in future de-XOR operations; and performing a parity calculation that generates an updated parity value that includes all pages of the memory block that have been programmed except for the faulty page.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 2, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Chris Yip, Piyush Sagdeo, Gautam Dusija, Vidhu Gupta
  • ERROR CORRECTION SCHEME IN FLASH MEMORY
    Publication number: 20200409787
    Abstract: An error correction scheme in flash memory. Methods include extending a lifetime of a memory block, including: receiving an indication that an error occurred during a write operation at a first location in a memory block, the first location associated with a faulty page of the memory block; and performing a modified exclusive OR (XOR) scheme on the memory block by: performing a de-XOR operation that generates recovery data of the faulty page; storing the recovery data in a location different from the faulty page of memory; marking the faulty page for exclusion in future de-XOR operations; and performing a parity calculation that generates an updated parity value that includes all pages of the memory block that have been programmed except for the faulty page.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Applicant: Western Digital Technologies, Inc.
    Inventors: Chris Yip, Piyush Sagdeo, Gautam Dusija, Vidhu Gupta