Patents by Inventor Vie-Na Kim

Vie-Na Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cell array of semiconductor memory device and a method of forming the same
    Patent number: 8237199
    Abstract: A cell array includes a semiconductor substrate including an active region comprising a first region, a second region, and a transition region, the second region being separated from the first region by the transition region, wherein a top surface of the second region is at a different level than a top surface of the first region. The cell array also includes a plurality of word lines crossing over the first region. The cell array also includes a selection line crossing over the active region, wherein at least a portion of the selection line is located over the transition region.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: August 7, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Sun Sel, Jung-Dal Choi, Chang-Seok Kang, Chang-Hyun Lee, Jang-Sik Lee, Vie-Na Kim
  • CELL ARRAY OF SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF FORMING THE SAME
    Publication number: 20100317157
    Abstract: A cell array includes a semiconductor substrate including an active region comprising a first region, a second region, and a transition region, the second region being separated from the first region by the transition region, wherein a top surface of the second region is at a different level than a top surface of the first region. The cell array also includes a plurality of word lines crossing over the first region. The cell array also includes a selection line crossing over the active region, wherein at least a portion of the selection line is located over the transition region.
    Type: Application
    Filed: August 5, 2010
    Publication date: December 16, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Sun Sel, Jung-Dal Choi, Chang-Seok Kang, Chang-Hyun Lee, Jang-Sik Lee, Vie-Na Kim
  • Cell array of semiconductor memory device and a method of forming the same
    Patent number: 7795643
    Abstract: A cell array includes a semiconductor substrate including an active region comprising a first region, a second region, and a transition region, the second region being separated from the first region by the transition region, wherein a top surface of the second region is at a different level than a top surface of the first region. The cell array also includes a plurality of word lines crossing over the first region. The cell array also includes a selection line crossing over the active region, wherein at least a portion of the selection line is located over the transition region.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Sun Sel, Jung-Dal Choi, Chang-Seok Kang, Chang-Hyun Lee, Jang-Sik Lee, Vie-Na Kim
  • Cell array of semiconductor memory device and a method of forming the same
    Publication number: 20070104011
    Abstract: A cell array includes a semiconductor substrate including an active region comprising a first region, a second region, and a transition region, the second region being separated from the first region by the transition region, wherein a top surface of the second region is at a different level than a top surface of the first region. The cell array also includes a plurality of word lines crossing over the first region. The cell array also includes a selection line crossing over the active region, wherein at least a portion of the selection line is located over the transition region.
    Type: Application
    Filed: August 22, 2006
    Publication date: May 10, 2007
    Inventors: Jong-Sun Sel, Jung-Dal Choi, Chang-Seok Kang, Chang-Hyun Lee, Jang-Sik Lee, Vie-Na Kim