Patents by Inventor Vijay C. Jaswa

Vijay C. Jaswa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4733353
    Abstract: A frame synchronization method and apparatus wherein each computer system of a multiply redundant processing system periodically executes a frame synchronization procedure in which it sequentially assumes a plurality of different operating states during which it pauses in the execution of a task it was performing and readies itself for synchronization, determines which other computer systems are ready for synchronization, synchronizes itself with one or more of the systems, and then determines which of the other systems has also synchronized itself. At a predetermined frame interval, the procedure is repeated and the computer systems resynchronize themselves with one another. The invention is impervious to stuck-at type faults, and may be embodied either totally or partially in software within each computer system, or in a separate hardware device.
    Type: Grant
    Filed: December 13, 1985
    Date of Patent: March 22, 1988
    Assignee: General Electric Company
    Inventor: Vijay C. Jaswa
  • Patent number: 4644498
    Abstract: Three hardware real time clock subcircuits are connected in a triple modular redundancy configuration to assure continued operation if one subcircuit fails. A power supply or processor failure will not cause a clock supplying other processors to fail. Output of voted master clock pulses to the counter in every subcircuit is inhibited until all power supplies are turned on and stabilized, and the time base of the real time clock pulses is variable. The output pulses of all subcircuits are voted on and the voter output is the real time clock. The master clock can be the processor clock.
    Type: Grant
    Filed: September 26, 1985
    Date of Patent: February 17, 1987
    Assignee: General Electric Company
    Inventors: James F. Bedard, Vijay C. Jaswa
  • Patent number: 4594651
    Abstract: This computer architecture is optimized for computing the state transitions of a controller, whereas conventional computers are optimized for data manipulation. The concurrent processor for control efficiently implements both the continuous and discrete control functions and has a processing element with two parts, the continuous and discrete processing elements. An arbitrary number of processing elements in a linear array have nearest-neighbor communications, and a general purpose microprocessor is provided to interact with them. Continuous states are computed concurrently and there is provision for interaction between continuous and discrete controls.
    Type: Grant
    Filed: January 18, 1984
    Date of Patent: June 10, 1986
    Assignee: General Electric Company
    Inventors: Vijay C. Jaswa, Charles E. Thomas
  • Patent number: 4581698
    Abstract: A technique of determining the distribution of pulses along two perpendicular X-Y axes of a numerically controlled machine can be used for linear, circular, and parabolic interpolations and may be extended to computer graphics. At the initial point on the curve and at each succeeding point, a decision is made to increment the X axis, the Y axis, or both axes. This decision is based on a deviation index which is an index of closeness to the desired curve. Hardware is minimized and involves only additions, compares, shifts, and increments/decrements.
    Type: Grant
    Filed: July 16, 1984
    Date of Patent: April 8, 1986
    Assignee: General Electric Company
    Inventor: Vijay C. Jaswa
  • Patent number: 4556956
    Abstract: An adjustable gain controller for a steam turbine valve position control loop includes an electronic operator, a proportional controller, a derivative controller and an integral controller. A steam flow condition error signal is amplified by the reciprocal of the valve's regulation value. The amplified error signal is supplied to the electronic operator and to the integral controller. The electronic operator includes means for initially selecting a value of A and n and generating a gain factor from a nonlinear gain characteristic function utilizing those values in combination with the valve's regulation value and the normalized error signal. The electronic operator multiplies the amplified error signal by the gain factor and applies the resultant signal to the proportional controller and the derivative controller. The output signals from the proportional, derivative and integral controllers are summed together and that sum is input into an electrohydraulic valve actuator system.
    Type: Grant
    Filed: September 16, 1983
    Date of Patent: December 3, 1985
    Assignee: General Electric Company
    Inventors: Royston J. Dickenson, Vijay C. Jaswa