Patents by Inventor Vijay Gangadhar Phadke

Vijay Gangadhar Phadke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150162833
    Abstract: A switching shunt regulator circuit includes a current source having an input for receiving an input voltage and an output for providing a DC current, and a shunt voltage regulator coupled to the output of the current source. The current source is configured to provide DC current to a DC load and DC current to the shunt voltage regulator when the DC load is coupled to the output. The DC current to the shunt voltage regulator regulates a voltage at the output. The shunt voltage regulator has a current carrying capacity greater than the sum of the DC current to the DC load and the DC current to the shunt voltage regulator.
    Type: Application
    Filed: December 3, 2014
    Publication date: June 11, 2015
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20150162906
    Abstract: An emitter switched bipolar transistor circuit includes a bipolar junction transistor (BJT) having a collector coupled to an output terminal, a metal oxide semiconductor field effect transistor (MOSFET) coupled to an emitter of the BJT, a bias voltage supply coupled to the base of the BJT, a buffer coupled to the base of the BJT, and a comparator. The comparator includes a first input coupled to the collector of the BJT, a second input coupled to a voltage reference, and an output coupled to an input of the buffer. The comparator is configured to receive a collector voltage of the BJT at the first input of the comparator, compare the received collector voltage with the voltage reference, and cause the buffer to inject a current pulse to the base of the BJT until the collector voltage is less than the voltage reference, indicating the BJT is substantially saturated.
    Type: Application
    Filed: December 3, 2014
    Publication date: June 11, 2015
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20140268943
    Abstract: A power system includes a DC power source having a maximum output voltage, a DC/AC inverter having an input coupled via a connection to the DC power source and an output for supplying AC power to a load, and a control circuit for controlling the DC/AC inverter. The control circuit is configured to maintain a DC voltage at the input of the DC/AC inverter above a threshold voltage to inhibit arcing as a result of a break in the connection between the DC power source and the DC/AC inverter. The threshold voltage is substantially equal to the maximum output voltage of the DC power source less a minimum arcing voltage for the connection between the DC power source and the DC/AC inverter.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: ASTEC INTERNATIONAL LIMITED
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20140268891
    Abstract: A multiphase DC/DC power converter includes an input, an output, at least a first converter and a second converter coupled in parallel between the input and the output, an inductor coupled to the first and second converters, an output capacitor coupled between the first and second converters and the output, and a control circuit coupled to the first converter and the second converter. The first and second converters each include a power switch. The control circuit is configured to switch the power switches at a frequency with a phase shift therebetween, and to vary the frequency to regulate a voltage at the output. Additionally, the control circuit may be configured to switch power switches at a fixed frequency with substantially no phase shift therebetween during startup of a multiphase DC/DC power converter, and at a variable frequency with a defined phase shift therebetween after startup.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: James Sigamani, Vijay Gangadhar Phadke
  • Publication number: 20140268947
    Abstract: A system includes first and second pluralities of single phase AC/DC power supplies each having an input for coupling to first and second phase voltages, respectively, in a polyphase power distribution system. The outputs of the power supplies are electrically connected in parallel for supplying DC current to a load at a substantially constant voltage. The system further includes a controller coupled to at least the first plurality of power supplies and configured to increase the DC current supplied to the load by at least one of the first plurality of power supplies in response to another one of the first plurality of power supplies shutting down. Various other systems, power supplies, controllers and methods are also disclosed.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20140247632
    Abstract: A grid-tie inverter includes a power circuit and a control circuit coupled to the power circuit. The power circuit has an input terminal for coupling to a DC power source and an output terminal for coupling to an AC power grid. The control circuit is configured to perturb an AC output current of the power circuit a first time and detect a first change in an AC output voltage of the power circuit without shutting down the power circuit, perturb the AC output current of the power circuit a second time and detect a second change in the AC output voltage of the power circuit, and shut down the power circuit in response to detecting at least the first change in the AC output voltage and the second change in the AC output voltage. Example embodiments and related methods of controlling grid-tied inverters are also disclosed.
    Type: Application
    Filed: March 4, 2013
    Publication date: September 4, 2014
    Inventors: Vijay Gangadhar Phadke, Yancy Fontanilla Boncato
  • Publication number: 20140217832
    Abstract: A system includes a soft DC power source having an output terminal, a DC load, a disconnect switch coupled between the output terminal of the DC power source and the DC load, and a capacitor coupled between a power side of the disconnect switch and a reference potential. The capacitor inhibits a rise in voltage across the disconnect switch as the disconnect switch is opening to inhibit arcing in the switch. Further, a disconnect switch assembly includes a pair of input terminals for coupling to a DC power source, a pair of output terminals for coupling to a DC load, a disconnect switch coupled between one of the input terminals and one of the output terminals, and a capacitor coupled between the pair of input terminals.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: ASTEC INTERNATIONAL LIMITED
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20130162042
    Abstract: A single phase redundant power supply system may include a first power supply having an input coupled to a first phase voltage in a polyphase power distribution system and an output coupled to a load for supplying an amount of DC power to the load, and a second power supply having an input for coupling to a second phase voltage in the polyphase power distribution system and an output coupled to the load for supplying an amount of DC power to the load. At least the first power supply is configured to reduce phase current imbalances in the polyphase power distribution system by adjusting the amount of DC power supplied to the load by the first power supply and the amount of DC power supplied to the load by the second power supply.
    Type: Application
    Filed: February 8, 2012
    Publication date: June 27, 2013
    Inventors: Vijay Gangadhar Phadke, Robert Lee Myers
  • Publication number: 20130163297
    Abstract: A single phase redundant power supply system may include a first power supply having an input coupled to a first phase voltage in a polyphase power distribution system and an output coupled to a load for supplying an amount of DC power to the load, and a second power supply having an input for coupling to a second phase voltage in the polyphase power distribution system and an output coupled to the load for supplying an amount of DC power to the load. At least the first power supply is configured to reduce phase current imbalances in the polyphase power distribution system by adjusting the amount of DC power supplied to the load by the first power supply and the amount of DC power supplied to the load by the second power supply.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Vijay Gangadhar Phadke, Robert Lee Myers
  • Patent number: 7262980
    Abstract: A circuit for controlling the operation of synchronous rectifiers. The circuit delays the turn-off of the synchronous rectifiers in accordance with the load current. The magnitude of the load current is examined to determine which of a plurality of delay elements is selected to delay turn-off of the synchronous rectifiers. Delay is accomplished by holding up for a predetermined time period one of a plurality of control signals utilized to determine when the synchronous rectifier should be turned-off.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: August 28, 2007
    Assignee: Astec International Limited
    Inventors: Vijay Gangadhar Phadke, Arlaindo Vitug Asuncion, Richard Daniel Cabbab Caubang
  • Patent number: 7209370
    Abstract: A circuit for reducing power loss for a soft switching full bridge converter at light loads and enabling very high frequency operation without using a cold plate approach. The circuit preferably includes a resonant inductor and blocking inductor on the converter's primary side arranged so as to provide reduced losses for a zero voltage switching bridge converter. The circuit provides these benefits even for converters having a power transformer with very low leakage inductance. The circuit is not dependent on the presence of a high leakage inductance for the power transformer. The circuit can also be used in soft switching half bridge converters. The circuit can also be used in a hard switching full bridge or half bridge converter for achieving zero voltage switching at reduced cost with reduced losses at light load, if the duty cycle of the converter is set near fifty percent.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: April 24, 2007
    Assignee: Astec International Limited
    Inventors: Vijay Gangadhar Phadke, Arlaindo Vitug Asuncion, Israel Gomez Beltran
  • Patent number: 7142085
    Abstract: Toroidal transformer and inductor configurations are described that allow for greater heat transfer away from internal device components. The inventive transformer allows for higher thermal and electrical efficiency, as well as for more efficient use of expensive components, such as copper wire. In one embodiment, a toroidal transformer provides access for cooling air by forming the primary winding from a single layer of thick wire and a secondary winding of few turns such that most of the primary winding is exposed to air flow. In another embodiment, a heat sink is positioned between the core and primary windings to conduct heat away from the transformer.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: November 28, 2006
    Assignee: Astec International Limited
    Inventor: Vijay Gangadhar Phadke
  • Patent number: 7136294
    Abstract: A soft switched zero voltage transition full bridge converter for reducing power loss at very light loads for zero voltage switching (ZVS) converters operating at high frequency. The converter has four switches in two switching legs, each having two switches connected in series between two input voltage terminals. Junction points of the legs are coupled to a primary winding of a transformer. The transformer has a secondary winding from which an output voltage of the converter is derived by rectifying and filtering. A pair of capacitive voltage dividers are connected between the input terminals, each formed by two small capacitors, each having a parallel-connected diode. The output voltage is regulated by phase shift control of the switches. The capacitors are selected small enough for storing only enough energy to enable ZVS in conjunction with two resonant inductors. The converter enables reduced component size of the inductors and energy storage capacitors.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: November 14, 2006
    Assignee: Astec International Limited
    Inventors: Vijay Gangadhar Phadke, Arlaindo Vitug Asuncion, Israel Gomez Beltran
  • Patent number: 7061212
    Abstract: A circuit that utilizes most of the energy stored in the bulk capacitor of an AC to DC or DC to DC converter power supply by providing an intermediate converter between a first stage boost converter and a DC-DC converter. When the bulk voltage starts to fall during the hold-up time, the intermediate converter boosts the falling voltage to maintain the regulated DC input to the DC to DC converter while reducing the operating range and increasing the operating duty cycle, so as to increase efficiency, reduce peak current and voltage stresses. The circuit also reduces the size of the output filter components and reduces the size of the bulk capacitance by up to half.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: June 13, 2006
    Assignee: Astec International Limited
    Inventor: Vijay Gangadhar Phadke
  • Patent number: 6788557
    Abstract: A power converter is provided that operates with a wide range input and provides the required hold up time using a smaller, less costly hold-up capacitor. A charging circuit is provided to charge a capacitor through an auxiliary winding. The power converter includes circuitry for channeling the energy from the capacitor to the converter to provide hold-up time during input power loss conditions, while having better utilization of stored energy. The power converter of the present invention also provides this function using fewer and lower cost components than prior art devices.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: September 7, 2004
    Assignee: Astec International Limited
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20040156217
    Abstract: A power converter is provided that operates with a wide range input and provides the required hold up time using a smaller, less costly hold-up capacitor. A charging circuit is provided to charge a capacitor through an auxiliary winding. The power converter includes circuitry for channeling the energy from the capacitor to the converter to provide hold-up time during input power loss conditions, while having better utilization of stored energy. The power converter of the present invention also provides this function using fewer and lower cost components than prior art devices.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 12, 2004
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20040080393
    Abstract: Toroidal transformer and inductor configurations are described that allow for greater heat transfer away from internal device components. The inventive transformer allows for higher thermal and electrical efficiency, as well as for more efficient use of expensive components, such as copper wire. In one embodiment, a toroidal transformer provides access for cooling air by forming the primary winding from a single layer of thick wire and a secondary winding of few turns such that most of the primary winding is exposed to air flow. In another embodiment, a heat sink is positioned between the core and primary windings to conduct heat away from the transformer.
    Type: Application
    Filed: October 17, 2003
    Publication date: April 29, 2004
    Inventor: Vijay Gangadhar Phadke
  • Patent number: 6714429
    Abstract: The present invention provides for an apparatus and corresponding method for controlling inrush current in an AC-DC power converter by providing a control circuit to limit inrush current efficiently during cold startup, warm startup, and power line disturbance conditions. The present invention controls inrush current without the need for an extra series lossy dissipative device and without causing undesirable voltage surges at the input of the DC—DC converter stage. The preferred embodiment includes use of the present invention for AC-DC converters having active power factor correction.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: March 30, 2004
    Assignee: Astec International Limited
    Inventor: Vijay Gangadhar Phadke
  • Publication number: 20030035311
    Abstract: The present invention provides for an apparatus and corresponding method for controlling inrush current in an AC-DC power converter by providing a control circuit to limit inrush current efficiently during cold startup, warm startup, and power line disturbance conditions. The present invention controls inrush current without the need for an extra series lossy dissipative device and without causing undesirable voltage surges at the input of the DC-DC converter stage. The preferred embodiment includes use of the present invention for AC-DC converters having active power factor correction.
    Type: Application
    Filed: August 9, 2002
    Publication date: February 20, 2003
    Inventor: Vijay Gangadhar Phadke
  • Patent number: 6504739
    Abstract: An improved secondary control circuit is provided for controlling synchronous rectifiers in a switching power converter. The secondary control circuit employs control signals from a primary control circuit to drive two synchronous rectifiers. In particular, the secondary control circuit is operable to drive both synchronous rectifiers to an on state during a dead time period of operation. The onset of the dead time period occurs when the diagonal conducting switching device is driven to an off state. The secondary control circuit is further operable to drive the second of the two synchronous rectifiers to an on state only after one of the diagonal switching devices has been driven to an off state by the primary control circuit. In this way, the improved secondary control circuit eliminates the risk of cross conduction between the synchronous rectifiers.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: January 7, 2003
    Assignee: Astec International Limited
    Inventor: Vijay Gangadhar Phadke