Patents by Inventor Vijay Kasturi

Vijay Kasturi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10269716
    Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: April 23, 2019
    Assignee: INTEL CORPORATION
    Inventors: Vijay Kasturi, Ana M. Yepes, Chung-Hao Chen, Bradley A. Jackson
  • Publication number: 20180005947
    Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Vijay KASTURI, Ana M. YEPES, Chung-Hao CHEN, Bradley A. JACKSON
  • Patent number: 9728912
    Abstract: An adaptor board may include a multi-layer circuit board having at least three layers, namely a first board layer, a second board layer, and a third board layer. A first plurality of cable contacts may be provided at the first board layer, and a second plurality of cable contacts may be provided at the third board layer.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: August 8, 2017
    Assignee: Intel Corporation
    Inventor: Vijay Kasturi
  • Publication number: 20170162987
    Abstract: An adaptor board may include a multi-layer circuit board having at least three layers, namely a first board layer, a second board layer, and a third board layer. A first plurality of cable contacts may be provided at the first board layer, and a second plurality of cable contacts may be provided at the third board layer.
    Type: Application
    Filed: December 8, 2015
    Publication date: June 8, 2017
    Inventor: Vijay KASTURI
  • Publication number: 20160380326
    Abstract: Techniques and mechanisms for enabling small radius bending of a flexible circuit. In an embodiment, the flexible circuit includes a first section, a second section and a third section between the first section and second section. Stacked structures of the first section include a first trace portion and a first conductor, and stacked structures of the second section include a second trace portion and a second conductor. In another embodiment, a first span structure of the third section exchanges a first signal between the first trace portion and the second trace portion while the first conductor and the second conductor are maintained at a reference potential. While the first signal is exchanged, a second span structure of the third section—coplanar with the first span structure—is maintained at the reference potential or propagates a second signal complementary to the first signal.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 29, 2016
    Inventors: Stephen H. Hall, Vijay Kasturi, Michael T. Hamann
  • Patent number: 9028281
    Abstract: Techniques for improving electrical performance of a connector. The techniques are compatible with the form factor of a standardized connector, such as an SFP connector or stacked SFP. The resulting connector has reduced insertion loss for high speed signals. Such techniques, which can be used separately or together, include shaping of conductive elements within the connector while still retaining the same mating contact arrangement. Changes may be made at the contact tail portions or in the intermediate portions where engagement to a connector housing occurs. The techniques also include the incorporation of lossy bridging members between conductive elements designated to be ground conductors. For connectors according to the stacked SFP configuration, multiple bridging members may be incorporated at multiple locations within the connector.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: May 12, 2015
    Assignee: Amphenol Corporation
    Inventors: Brian Kirk, Vijay Kasturi
  • Patent number: 8926377
    Abstract: Techniques for improving electrical performance of a connector. The techniques are compatible with the form factor of a standardized connector, such as an SFP connector or stacked SFP. The resulting connector has reduced insertion loss for high speed signals. Such techniques, which can be used separately or together, include shaping of conductive elements within the connector while still retaining the same mating contact arrangement. Changes may be made at the contact tail portions or in the intermediate portions where engagement to a connector housing occurs. The techniques also include the incorporation of lossy bridging members between conductive elements designated to be ground conductors. For connectors according to the stacked SFP configuration, multiple bridging members may be incorporated at multiple locations within the connector.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: January 6, 2015
    Assignee: Amphenol Corporation
    Inventors: Brian Kirk, Vijay Kasturi
  • Publication number: 20130017733
    Abstract: Techniques for improving electrical performance of a connector. The techniques are compatible with the form factor of a standardized connector, such as an SFP connector or stacked SFP. The resulting connector has reduced insertion loss for high speed signals. Such techniques, which can be used separately or together, include shaping of conductive elements within the connector while still retaining the same mating contact arrangement. Changes may be made at the contact tail portions or in the intermediate portions where engagement to a connector housing occurs. The techniques also include the incorporation of lossy bridging members between conductive elements designated to be ground conductors. For connectors according to the stacked SFP configuration, multiple bridging members may be incorporated at multiple locations within the connector.
    Type: Application
    Filed: November 12, 2010
    Publication date: January 17, 2013
    Applicant: AMPHENOL CORPORATION
    Inventors: Brian Kirk, Vijay Kasturi
  • Publication number: 20130012038
    Abstract: Techniques for improving electrical performance of a connector. The techniques are compatible with the form factor of a standardized connector, such as an SFP connector or stacked SFP. The resulting connector has reduced insertion loss for high speed signals. Such techniques, which can be used separately or together, include shaping of conductive elements within the connector while still retaining the same mating contact arrangement. Changes may be made at the contact tail portions or in the intermediate portions where engagement to a connector housing occurs. The techniques also include the incorporation of lossy bridging members between conductive elements designated to be ground conductors. For connectors according to the stacked SFP configuration, multiple bridging members may be incorporated at multiple locations within the connector.
    Type: Application
    Filed: November 12, 2010
    Publication date: January 10, 2013
    Applicant: Amphenol Corporation
    Inventors: Brian Kirk, Vijay Kasturi