Abstract: The disclosure relates to method and system for image scaling. The method includes determining a nature of image scaling required to be performed on an input image based on a vertical scaling ratio and a horizontal scaling ratio and includes determining if the image scaling is an upscaling or a downscaling, a symmetric scaling or an asymmetric scaling. The method further includes determining an overall scaling ratio based on a lower or an equal of the vertical scaling ratio and the horizontal scaling ratio. The method further includes scaling an input image to a target image using a polyphase finite impulse response (FIR) scaling filter based on the nature of the image scaling, the overall scaling ratio, and a structure of the polyphase FIR scaling filter. The scaling includes dynamically performing at least one of duplication of lines, addition of filler lines, duplication of pixels, and addition of filler pixels.

Abstract: This disclosure relates generally to a host-peripheral interface, and more particularly to an apparatus and method for dynamically switching a high-speed clock of a host device. In one embodiment, a method is provided for dynamically switching a high-speed clock of a host device. The method comprises determining a status of the host device and a peripheral device coupled to the host device with respect to a transmission and a reception of high-speed data respectively, and switching the high-speed clock between the host device and the peripheral device based on the status.

Abstract: This disclosure relates generally to a host-peripheral interface, and more particularly to system and method for dynamically adjusting a low power clock frequency of a host device upon detecting coupling of a peripheral device to the host device. In one embodiment, a method is provided for dynamically adjusting a low power clock frequency of a host device. The method comprises dynamically determining an initial frequency of a low power clock of the host device at which a low power link between the host device and a peripheral device is operational, computing a low power clock frequency range of the host device based on the initial frequency of the low power clock, assessing the low power link in the low power clock frequency range, and adjusting the low power clock frequency to a typical frequency of the low power clock frequency range based on the assessment.

Abstract: This disclosure relates generally to a host-peripheral interface, and more particularly to an apparatus and method for dynamically switching a high-speed clock of a host device. In one embodiment, a method is provided for dynamically switching a high-speed clock of a host device. The method comprises determining a status of the host device and a peripheral device coupled to the host device with respect to a transmission and a reception of high-speed data respectively, and switching the high-speed clock between the host device and the peripheral device based on the status.

Abstract: This disclosure relates generally to a host-peripheral interface, and more particularly to system and method for dynamically adjusting a low power clock frequency of a host device upon detecting coupling of a peripheral device to the host device. In one embodiment, a method is provided for dynamically adjusting a low power clock frequency of a host device. The method comprises dynamically determining an initial frequency of a low power clock of the host device at which a low power link between the host device and a peripheral device is operational, computing a low power clock frequency range of the host device based on the initial frequency of the low power clock, assessing the low power link in the low power clock frequency range, and adjusting the low power clock frequency to a typical frequency of the low power clock frequency range based on the assessment.

Abstract: The present disclosure relates to methods and related systems and computer-readable mediums. The methods include receiving a design for a programmable logic device (PLD). The design includes a plurality of nodes. The method also includes modifying, via one or more hardware processors, the design to include a logic analyzer circuit. The logic analyzer circuit includes inputs for a plurality of selectable groups of capture signals for connecting to selected nodes of the plurality of nodes. In addition, the method includes outputting the design to the PLD to program the PLD. The disclosure also relates a system comprising a user logic circuit, a logic analyzer circuit, and a memory.

Abstract: This disclosure generally relates to encoding, transmission, and decoding of digital video, and more particularly to methods and systems for minimizing decoding delay in distributed video coding (DVC). In one embodiment, a video decoding method is disclosed, comprising: obtaining side information; obtaining a syndrome bit chunk corresponding to a non-key-frame bit-plane; performing, via one or more processors, at least one non-key-frame bit-plane channel decoding iteration using the side information and the syndrome bit chunk; generating a decoded bit-plane via performing the at least one non-key-frame bit-plane channel decoding iteration; determining a bit error rate measure for the decoded bit-plane; determining, based on the bit error rate measure, a number of additional syndrome bit chunks to request; and providing a request for the additional syndrome bit chunks.

Abstract: The present disclosure relates to methods and related systems and computer-readable mediums. The methods include receiving a design for a programmable logic device (PLD). The design includes a plurality of nodes. The method also includes modifying, via one or more hardware processors, the design to include a logic analyzer circuit. The logic analyzer circuit includes inputs for a plurality of selectable groups of capture signals for connecting to selected nodes of the plurality of nodes. In addition, the method includes outputting the design to the PLD to program the PLD. The disclosure also relates a system comprising a user logic circuit, a logic analyzer circuit, and a memory.

Abstract: A method, system, and non-transitory computer-readable storage medium for image scaling is provided. In one embodiment, the method may include determining one or more filter phases based on a vertical target grid distance and a horizontal target grid distance; and scaling, by one or more hardware processors, an input image using filter coefficients corresponding to the one or more filters phases to output a target image. The horizontal target grid distance may be based on a ratio of a number of horizontal filter phases and a horizontal scaling ratio, and the vertical target grid distance may be based on a ratio of a number of vertical filter phases and a vertical scaling ratio.

Abstract: A method and device for multiview distributed video coding with adaptive syndrome bit rate control are disclosed. In one embodiment, multiple groups, including video frames coming from associated digital cameras, are formed. Further, video frames coming from a predetermined number of the digital cameras are declared as key video frames. Furthermore, video frames coming from remaining digital cameras are declared as non-key video frames. In addition, the key video frames are encoded to obtain encoded bits. Moreover, the non-key video frames are encoded to obtain syndrome bits. Also, the encoded key video frames are decoded, to obtain decoded bits and the encoded non-key video frames are decoded, to obtain decoded bits and CRC bits. Further, an optimal number of syndrome bits in each non-key video frame are determined. Furthermore, the encoded bits and determined optimal number of syndrome bits are sent to multiple receivers.

Abstract: This disclosure generally relates to digital image and video signal processing, and more particularly to methods and systems for dynamic brightness correction. In one embodiment, an electronic circuit configured to perform an image correction method is disclosed, the method comprising: obtaining a pixel value of a color space component from an image; determining whether to perform mid-tone correction for the pixel value of the color space component; calculating, via the electronic circuit, a corrected pixel value based on the determination of whether to perform the mid-tone correction for the pixel value of the color space component; and outputting the corrected pixel value. The color space component may be one of: an Intensity component from a Hue-Saturation-Intensity color space; a Value component from a Hue-Saturation-Value color space; a Lightness component from a Hue-Saturation-Lightness color space; and a Brightness component from a Hue-Saturation-Brightness color space.

Abstract: This disclosure generally relates to encoding, transmission, and decoding of digital video, and more particularly to methods and systems for minimizing decoding delay in distributed video coding (DVC). In one embodiment, a video decoding method is disclosed, comprising: obtaining side information; obtaining a syndrome bit chunk corresponding to a non-key-frame bit-plane; performing, via one or more processors, at least one non-key-frame bit-plane channel decoding iteration using the side information and the syndrome bit chunk; generating a decoded bit-plane via performing the at least one non-key-frame bit-plane channel decoding iteration; determining a bit error rate measure for the decoded bit-plane; determining, based on the bit error rate measure, a number of additional syndrome bit chunks to request; and providing a request for the additional syndrome bit chunks.

Abstract: This disclosure generally relates to encoding, transmission, and decoding of digital video, and more particularly to methods and systems for minimizing decoding delay in distributed video coding (DVC). In one embodiment, a video decoding method is disclosed. The video decoding method may include obtaining side information and obtaining a syndrome bit chunk corresponding to a non-key-frame bit-plane. One or more processors may perform one non-key-frame bit-plane channel decoding iteration using the side information and the syndrome bit chunk. A decoded bit-plane may be generated via performing the at least one non-key-frame bit-plane channel decoding iteration. Also, a bit error rate measure for the decoded bit-plane may be determined. A number of additional syndrome bit chunks to request may be determined based on the bit error rate measure, and the request for the additional syndrome bit chunks provided.

Abstract: This disclosure generally relates to digital image and video signal processing, and more particularly to methods and systems for dynamic brightness correction. In one embodiment, an electronic circuit configured to perform an image correction method is disclosed, the method comprising: obtaining a pixel value of a color space component from an image; determining whether to perform mid-tone correction for the pixel value of the color space component; calculating, via the electronic circuit, a corrected pixel value based on the determination of whether to perform the mid-tone correction for the pixel value of the color space component; and outputting the corrected pixel value. The color space component may be one of: an Intensity component from a Hue-Saturation-Intensity color space; a Value component from a Hue-Saturation-Value color space; a Lightness component from a Hue-Saturation-Lightness color space; and a Brightness component from a Hue-Saturation-Brightness color space.

Abstract: This disclosure generally relates to encoding, transmission, and decoding of digital video, and more particularly to methods and systems for minimizing decoding delay in distributed video coding (DVC). In one embodiment, a video decoding method is disclosed, comprising: obtaining side information; obtaining a syndrome bit chunk corresponding to a non-key-frame bit-plane; performing, via one or more processors, at least one non-key-frame bit-plane channel decoding iteration using the side information and the syndrome bit chunk; generating a decoded bit-plane via performing the at least one non-key-frame bit-plane channel decoding iteration; determining a bit error rate measure for the decoded bit-plane; determining, based on the bit error rate measure, a number of additional syndrome bit chunks to request; and providing a request for the additional syndrome bit chunks.

Abstract: System and method for dynamically and adaptively enhancing user chosen colors on a frame-by-frame basis of an incoming digital video signal using a saturation gain is disclosed. In one embodiment, a saturation 1D-histogram for each of the user chosen colors is formed using a substantially current video frame. Further, a saturation gain, adaptive to slow or fast moving image sequences, is dynamically computed for each of the user chosen colors of the substantially current video frame using the corresponding saturation 1D-histogram of the substantially current video frame and corresponding saturation 1D-histogram information and a saturation gain of a substantially previous video frame. Furthermore, which one of the dynamically computed saturation gains associated with the user chosen colors to be applied on a per-pixel basis is determined. The determined saturation gain is applied to saturation component on the per-pixel basis in the substantially current or next video frame.

Abstract: A method and device for multiview distributed video coding with adaptive syndrome bit rate control are disclosed. In one embodiment, multiple groups, including video frames coming from associated digital cameras, are formed. Further, video frames coming from a predetermined number of the digital cameras are declared as key video frames. Furthermore, video frames coming from remaining digital cameras are declared as non-key video frames. In addition, the key video frames are encoded to obtain encoded bits. Moreover, the non-key video frames are encoded to obtain syndrome bits. Also, the encoded key video frames are decoded, to obtain decoded bits and the encoded non-key video frames are decoded, to obtain decoded bits and CRC bits. Further, an optimal number of syndrome bits in each non-key video frame are determined. Furthermore, the encoded bits and determined optimal number of syndrome bits are sent to multiple receivers.

Abstract: System and method for dynamically and adaptively enhancing user chosen colors on a frame-by-frame basis of an incoming digital video signal using a saturation dependent value bright-gain is disclosed. In one embodiment, a value-saturation 2D-histogram for each of the user chosen colors is formed using a substantially current video frame. Further, a saturation dependent value bright-gain is dynamically computed for each of the user chosen colors using the corresponding value-saturation 2D-histogram of the substantially current video frame and corresponding value-saturation 2D-histogram information and a saturation dependent value bright-gain of a substantially previous video frame. Furthermore, which one of the dynamically computed saturation dependent value bright-gains associated with the user chosen colors to be applied on a per-pixel basis is determined.

Abstract: System and method for dynamically and adaptively enhancing user chosen colors on a frame-by-frame basis of an incoming digital video signal using a saturation gain is disclosed. In one embodiment, a saturation 1D-histogram for each of the user chosen colors is formed using a substantially current video frame. Further, a saturation gain, adaptive to slow or fast moving image sequences, is dynamically computed for each of the user chosen colors of the substantially current video frame using the corresponding saturation 1D-histogram of the substantially current video frame and corresponding saturation 1D-histogram information and a saturation gain of a substantially previous video frame. Furthermore, which one of the dynamically computed saturation gains associated with the user chosen colors to be applied on a per-pixel basis is determined. The determined saturation gain is applied to saturation component on the per-pixel basis in the substantially current or next video frame.

Abstract: System and method for dynamically and adaptively enhancing user chosen colors on a frame-by-frame basis of an incoming digital video signal using a saturation dependent value bright-gain is disclosed. In one embodiment, a value-saturation 2D-histogram for each of the user chosen colors is formed using a substantially current video frame. Further, a saturation dependent value bright-gain is dynamically computed for each of the user chosen colors using the corresponding value-saturation 2D-histogram of the substantially current video frame and corresponding value-saturation 2D-histogram information and a saturation dependent value bright-gain of a substantially previous video frame. Furthermore, which one of the dynamically computed saturation dependent value bright-gains associated with the user chosen colors to be applied on a per-pixel basis is determined.