Patents by Inventor Vijay Kumar Pathak

Vijay Kumar Pathak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • 10 Gbit/sec transmit structure with programmable clock delays
    Patent number: 7158727
    Abstract: The present invention provides a robust solution to the task of re-aligning data at the transmit end of a fiber optic or other high performance serial link, and also offers flexibility in the circuit board design approach. A high performance analog phase locked-loop circuit is used to simultaneously provide clock recovery for multiple bit streams. The power dissipation required to perform clock recovery is thereby reduced to a fraction of that required in conventional transmit systems. This analog phase locked loop produces plural phase output signals. An output multiplexer selects one phase for use in electrical to optical conversion.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: January 2, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Vijay Kumar Pathak, Bharadwaj Parthasarathy, Srinath Devalapalli
  • Novel 10 Gbit/sec transmit structure with programmable clock delays
    Publication number: 20040228636
    Abstract: The present invention provides a robust solution to the task of re-aligning data at the transmit end of a fiber optic or other high performance serial link, and also offers flexibility in the circuit board design approach. A high performance analog phase locked-loop circuit is used to simultaneously provide clock recovery for multiple bit streams. The power dissipation required to perform clock recovery is thereby reduced to a fraction of that required in conventional transmit systems. This analog phase locked loop produces plural phase output signals. An output multiplexer selects one phase for use in electrical to optical conversion.
    Type: Application
    Filed: September 27, 2002
    Publication date: November 18, 2004
    Inventors: Vijay Kumar Pathak, Bharadwaj Parthasarathy, Srinath Devalapalli