Patents by Inventor Vijay M. Sajja

Vijay M. Sajja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit board for high pin count surface mount pin grid arrays
    Patent number: 5400948
    Abstract: A method for fabricating a printed circuit board for high pin count surface mount pin grid arrays is provided where surface mount pads for soldering a surface mount pin grid array package are isolated by solder mask layers. The printed circuit board is laminated with one or more solder mask layers containing apertures therein to expose the surface mount pad locations.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: March 28, 1995
    Assignee: Aptix Corporation
    Inventors: Vijay M. Sajja, Siamak Jonaidi
  • Circuit board for high pin count surface mount pin grid arrays
    Patent number: 5313021
    Abstract: A printed circuit board is provided with surface mount pads for soldering a surface mount pin grid array package. The printed circuit board is laminated with one or more solder mask layers containing apertures therein to expose the surface mount pad locations.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: May 17, 1994
    Assignee: Aptix Corporation
    Inventors: Vijay M. Sajja, Siamak Jonaidi
  • Solder plating process and semiconductor product
    Patent number: 4589962
    Abstract: A method for solder plating metal leads in plastic semiconductor packages comprises cleaning the leads followed by electroplating tin or a tin/lead alloy onto the leads. The cleaning is effected with a non-corrosive solution which is either a carboxylic acid, a hydroxycarboxylic acid, or a combination of both. The electroplating solution is a sulfonic acid or citric acid based system, including suitable tin salts and/or lead salts. A sequestering agent may be used to inhibit the corrosive effect of the electroplating bath.
    Type: Grant
    Filed: June 3, 1985
    Date of Patent: May 20, 1986
    Assignee: National Semiconductor Corporation
    Inventors: Vijay M. Sajja, Ranjan Mathew, Jagdish Belane