Patents by Inventor Vijay M. Vaniapura
Vijay M. Vaniapura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11094528Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.Type: GrantFiled: February 22, 2019Date of Patent: August 17, 2021Assignees: BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD., MATTSON TECHNOLOGY, INC.Inventors: Tongchuan Gao, Grigoriy Kishko, Vijay M. Vaniapura, Michael X. Yang
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Patent number: 10901321Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.Type: GrantFiled: March 18, 2020Date of Patent: January 26, 2021Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.Inventors: Vijay M. Vaniapura, Shawming Ma, Li Hou
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Publication number: 20200218158Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.Type: ApplicationFiled: March 18, 2020Publication date: July 9, 2020Inventors: Vijay M. Vaniapura, Shawming Ma, Li Hou
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Publication number: 20200135554Abstract: Apparatus, systems, and methods for conducting a hardmask (e.g., boron doped amorphous carbon hardmask) removal process on a workpiece are provided. In one example implementation, a method includes supporting a workpiece on a workpiece support in a processing chamber. The method can include generating a plasma from a process gas in a plasma chamber using a plasma source. The plasma chamber can be separated from the processing chamber by a separation grid. The method can include exposing the workpiece to one or more radicals generated in the plasma to perform a plasma strip process on the workpiece to at least partially remove the hardmask layer from the workpiece. The method can include exposing the workpiece to water vapor as a passivation agent during the plasma strip process.Type: ApplicationFiled: October 10, 2019Publication date: April 30, 2020Inventors: Li Hou, Vijay M. Vaniapura, Jeyta Anand Sahay, Hua Chung, Shuang Meng, Shawming Ma
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Patent number: 10599039Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.Type: GrantFiled: May 17, 2017Date of Patent: March 24, 2020Assignees: MATTSON TECHNOLOGY, INC., BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY, CO., LTDInventors: Vijay M. Vaniapura, Shawming Ma, Li Hou
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Publication number: 20190189420Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.Type: ApplicationFiled: February 22, 2019Publication date: June 20, 2019Inventors: Tongchuan Gao, Grigoriy Kishko, Vijay M. Vaniapura, Michael X. Yang
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Patent number: 10217626Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.Type: GrantFiled: December 15, 2017Date of Patent: February 26, 2019Assignee: Mattson Technology, Inc.Inventors: Tongchuan Gao, Grigoriy Kishko, Vijay M. Vaniapura, Michael X. Yang
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Patent number: 10078266Abstract: Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.Type: GrantFiled: February 24, 2017Date of Patent: September 18, 2018Assignee: Mattson Technology, Inc.Inventors: Wei-Hua Liou, Chun-Yen Kang, Vijay M. Vaniapura, Hai-Au M. Phan-Vu, Shawming Ma
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Publication number: 20180074409Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.Type: ApplicationFiled: May 17, 2017Publication date: March 15, 2018Inventors: Vijay M. Vaniapura, Shawming Ma, Li Hou
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Publication number: 20180053628Abstract: Separation grids for plasma processing apparatus are provided. In some embodiments, a plasma processing apparatus includes a plasma chamber. The plasma processing apparatus includes a processing chamber. The processing chamber can be separated from the plasma chamber. The apparatus can include a separation grid. The separation grid can separate the plasma chamber and the processing chamber. The apparatus can include a temperature control system. The temperature control system can be configured to regulate the temperature of the separation grid to affect a uniformity of a plasma process on a substrate. In some embodiments, a separation grid can have a varying thickness profile across a cross-section of the separation grid to affect a flow of neutral species through the separation grid.Type: ApplicationFiled: May 10, 2017Publication date: February 22, 2018Inventors: Vijay M. Vaniapura, Shawming Ma, Vladimir Nagorny, Ryan M. Pakulski
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Publication number: 20170248849Abstract: Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.Type: ApplicationFiled: February 24, 2017Publication date: August 31, 2017Inventors: Wei-Hua Liou, Chun-Yen Kang, Vijay M. Vaniapura, Hai-Au M. Phan-Vu, Shawming Ma
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Publication number: 20170207077Abstract: Systems, methods, and apparatus for processing a substrate in a plasma processing apparatus using a variable pattern separation grid are provided. In one example implementation, a plasma processing apparatus can have a plasma chamber and a processing chamber separated from the plasma chamber. The apparatus can further include a variable pattern separation grid separating the plasma chamber and the processing chamber. The variable pattern separation grid can include a plurality grid plates. Each grid plate can have a grid pattern with one or more holes. At least one of the plurality of grid plates is movable relative to the other grid plates in the plurality of grid plates such that the variable pattern separation grid can provide a plurality of different composite grid patterns.Type: ApplicationFiled: January 11, 2017Publication date: July 20, 2017Inventors: Vladimir Nagorny, Shawming Ma, Vijay M. Vaniapura, Ryan M. Pakulski